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Searched refs:V3D_MAX_SAMPLES (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/broadcom/common/
Dv3d_limits.h58 #define V3D_MAX_SAMPLES 4 macro
/external/mesa3d/src/broadcom/compiler/
Dv3d_nir_lower_txf_ms.c35 #define V3D_MAX_SAMPLES 4 macro
Dnir_to_vir.c1328 int num_samples = c->msaa_per_sample_output ? V3D_MAX_SAMPLES : 1; in vir_emit_tlb_color_write()
1331 &c->sample_colors[(rt * V3D_MAX_SAMPLES + i) * 4] : in vir_emit_tlb_color_write()
1922 assert(sample_index < V3D_MAX_SAMPLES); in vir_emit_tlb_color_read()
1949 &c->color_reads[(rt * V3D_MAX_SAMPLES + sample_index) * 4]; in vir_emit_tlb_color_read()
1969 int num_samples = c->fs_key->msaa ? V3D_MAX_SAMPLES : 1; in vir_emit_tlb_color_read()
2029 &c->color_reads[(rt * V3D_MAX_SAMPLES + i) * 4]; in vir_emit_tlb_color_read()
2123 assert(sample_idx < V3D_MAX_SAMPLES); in ntq_emit_per_sample_color_write()
2125 unsigned offset = (rt * V3D_MAX_SAMPLES + sample_idx) * 4; in ntq_emit_per_sample_color_write()
Dv3d_nir_lower_logic_ops.c326 for (int i = 0; i < V3D_MAX_SAMPLES; i++) { in v3d_nir_lower_logic_op_instr()
Dv3d_compiler.h571 struct qreg color_reads[V3D_MAX_DRAW_BUFFERS * V3D_MAX_SAMPLES * 4];
572 struct qreg sample_colors[V3D_MAX_DRAW_BUFFERS * V3D_MAX_SAMPLES * 4];
/external/mesa3d/src/gallium/drivers/v3d/
Dv3d_context.c351 v3d->sample_mask = (1 << V3D_MAX_SAMPLES) - 1; in v3d_context_create()
Dv3d_screen.c526 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES) in v3d_screen_is_format_supported()
Dv3d_program.c557 v3d->sample_mask != (1 << V3D_MAX_SAMPLES) - 1); in v3d_update_compiled_fs()
Dv3dx_state.c82 v3d->sample_mask = sample_mask & ((1 << V3D_MAX_SAMPLES) - 1); in v3d_set_sample_mask()
/external/mesa3d/src/broadcom/vulkan/
Dv3dv_pipeline.c1142 p_stage->pipeline->sample_mask != (1 << V3D_MAX_SAMPLES) - 1; in pipeline_populate_v3d_fs_key()
2838 pipeline->sample_mask = (1 << V3D_MAX_SAMPLES) - 1; in pipeline_set_sample_mask()