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/external/llvm/test/MC/Disassembler/ARM/
Dthumb-v8.1a.txt2 …t llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
6 # CHECK-V8: warning: invalid instruction encoding
7 # CHECK-V8: [0x11,0xff,0x12,0x0b]
8 # CHECK-V8: ^
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x21,0xff,0x12,0x0b]
14 # CHECK-V8: ^
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0xff,0x54,0x0b]
20 # CHECK-V8: ^
[all …]
Darmv8.1a.txt2 …not llvm-mc -triple armv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x54,0x0b,0x12,0xf3]
14 # CHECK-V8: warning: invalid instruction encoding
15 # CHECK-V8: [0x12,0x0b,0x21,0xf3]
16 # CHECK-V8: warning: invalid instruction encoding
17 # CHECK-V8: [0x54,0x0c,0x12,0xf3]
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0x0c,0x21,0xf3]
29 # CHECK-V8: warning: invalid instruction encoding
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dthumb-v8.1a.txt2 …t llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
6 # CHECK-V8: warning: invalid instruction encoding
7 # CHECK-V8: [0x11,0xff,0x12,0x0b]
8 # CHECK-V8: ^
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x21,0xff,0x12,0x0b]
14 # CHECK-V8: ^
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0xff,0x54,0x0b]
20 # CHECK-V8: ^
[all …]
Darmv8.1a.txt2 …not llvm-mc -triple armv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
12 # CHECK-V8: warning: invalid instruction encoding
13 # CHECK-V8: [0x54,0x0b,0x12,0xf3]
14 # CHECK-V8: warning: invalid instruction encoding
15 # CHECK-V8: [0x12,0x0b,0x21,0xf3]
16 # CHECK-V8: warning: invalid instruction encoding
17 # CHECK-V8: [0x54,0x0c,0x12,0xf3]
18 # CHECK-V8: warning: invalid instruction encoding
19 # CHECK-V8: [0x12,0x0c,0x21,0xf3]
29 # CHECK-V8: warning: invalid instruction encoding
[all …]
/external/llvm-project/llvm/test/CodeGen/SPARC/
Dfp16-promote.ll2 ; RUN: llc -mtriple=sparc-linux-gnu < %s | FileCheck %s -check-prefixes=ALL,V8,V8-OPT
3 ; RUN: llc -mtriple=sparcel-linux-gnu < %s | FileCheck %s -check-prefixes=ALL,V8,V8-OPT
4 ; RUN: llc -mtriple=sparc-linux-gnu -O0 < %s | FileCheck %s -check-prefixes=ALL,V8,V8-UNOPT
20 ; V8-LABEL: test_fpextend_float:
21 ; V8: ! %bb.0:
22 ; V8-NEXT: save %sp, -96, %sp
23 ; V8-NEXT: call __gnu_h2f_ieee
24 ; V8-NEXT: lduh [%i0], %o0
25 ; V8-NEXT: ret
26 ; V8-NEXT: restore
[all …]
Dfloat.ll1 ; RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
2 ; RUN: llc -march=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
3 ; RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
7 ; V8-LABEL: test_neg:
8 ; V8: call get_double
9 ; V8-BE: fnegs %f0, %f0
10 ; V8-EL: fnegs %f1, %f1
12 ; V8-UNOPT-LABEL: test_neg:
13 ; V8-UNOPT: fnegs
14 ; V8-UNOPT: ! implicit-def
[all …]
D2011-01-11-CC.ll1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
8 ; V8: addcc
9 ; V8-NOT: subcc
10 ; V8: addx
24 ; V8: test_select_int_icc
25 ; V8: cmp
26 ; V8: {{be|bne}}
39 ; V8: test_select_fp_icc
40 ; V8: cmp
41 ; V8: {{be|bne}}
[all …]
D2013-05-17-CallFrame.ll2 ; RUN: llc -march=sparc < %s | FileCheck %s --check-prefix=V8
9 ; V8-LABEL: variable_alloca_with_adj_call_stack:
10 ; V8: .cfi_startproc
11 ; V8-NEXT: ! %bb.0: ! %entry
12 ; V8-NEXT: save %sp, -96, %sp
13 ; V8-NEXT: .cfi_def_cfa_register %fp
14 ; V8-NEXT: .cfi_window_save
15 ; V8-NEXT: .cfi_register %o7, %i7
16 ; V8-NEXT: add %i0, 7, %i0
17 ; V8-NEXT: and %i0, -8, %i0
[all …]
D2011-01-11-Call.ll2 ; RUN: llc -march=sparc <%s | FileCheck %s --check-prefix=V8
5 ; V8-LABEL: test
6 ; V8: save %sp
7 ; V8: call foo
8 ; V8-NEXT: nop
9 ; V8: call bar
10 ; V8-NEXT: nop
11 ; V8: ret
12 ; V8-NEXT: restore
35 ; V8-LABEL: test_tail_call_with_return
[all …]
D2011-01-11-FrameAddr.ll1 ;RUN: llc -march=sparc -show-mc-encoding < %s | FileCheck %s -check-prefix=V8
3 ;RUN: llc -march=sparc -show-mc-encoding -regalloc=basic < %s | FileCheck %s -check-prefix=V8
10 ;V8-LABEL: frameaddr:
11 ;V8: save %sp, -96, %sp
12 ;V8: ret
13 ;V8: restore %g0, %fp, %o0
33 ;V8-LABEL: frameaddr2:
34 ;V8: ta 3 ! encoding: [0x91,0xd0,0x20,0x03]
35 ;V8: ld [%fp+56], {{.+}}
36 ;V8: ld [{{.+}}+56], {{.+}}
[all …]
/external/llvm-project/llvm/test/Transforms/LoopUnroll/ARM/
Dinstr-size-costs.ll2 …ial -unroll-optsize-threshold=18 -mtriple=thumbv8 -S %s -o - | FileCheck %s --check-prefix=CHECK-V8
5 ; CHECK-V8-LABEL: @test_i32_add_optsize(
6 ; CHECK-V8-NEXT: entry:
7 ; CHECK-V8-NEXT: br label [[LOOP:%.*]]
8 ; CHECK-V8: loop:
9 ; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
10 ; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[IV]]
11 ; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 [[IV]]
12 ; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, i32* [[ADDR_A]], align 4
13 ; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, i32* [[ADDR_B]], align 4
[all …]
/external/llvm/test/MC/Sparc/
Dsparcv9-instructions.s1 ! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
4 ! V8: error: invalid instruction mnemonic
5 ! V8-NEXT: addc %g2, %g1, %g3
9 ! V8: error: invalid instruction mnemonic
10 ! V8-NEXT: addccc %g1, %g2, %g3
14 ! V8: error: invalid instruction mnemonic
15 ! V8-NEXT: subc %g2, %g1, %g3
19 ! V8: error: invalid instruction mnemonic
20 ! V8-NEXT: subccc %g1, %g2, %g3
24 ! V8: error: instruction requires a CPU feature not currently enabled
[all …]
/external/llvm-project/llvm/test/MC/Sparc/
Dsparcv9-instructions.s1 ! RUN: not llvm-mc %s -arch=sparc -show-encoding 2>&1 | FileCheck %s --check-prefix=V8
4 ! V8: error: invalid instruction mnemonic
5 ! V8-NEXT: addc %g2, %g1, %g3
9 ! V8: error: invalid instruction mnemonic
10 ! V8-NEXT: addccc %g1, %g2, %g3
14 ! V8: error: invalid instruction mnemonic
15 ! V8-NEXT: subc %g2, %g1, %g3
19 ! V8: error: invalid instruction mnemonic
20 ! V8-NEXT: subccc %g1, %g2, %g3
24 ! V8: error: instruction requires a CPU feature not currently enabled
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dcmse-clear-float-hard2.ll3 ; RUN: FileCheck %s --check-prefix=CHECK-V8-LE
5 ; RUN: FileCheck %s --check-prefix=CHECK-V8-BE
16 ; CHECK-V8-LE-LABEL: fidififiddddff:
17 ; CHECK-V8-LE: @ %bb.0: @ %entry
18 ; CHECK-V8-LE-NEXT: push {r7, lr}
19 ; CHECK-V8-LE-NEXT: mov lr, r3
20 ; CHECK-V8-LE-NEXT: mov r12, r0
21 ; CHECK-V8-LE-NEXT: mov r0, r1
22 ; CHECK-V8-LE-NEXT: mov r1, r2
23 ; CHECK-V8-LE-NEXT: ldr r3, [sp, #8]
[all …]
Dcodesize-ifcvt.mir3 # RUN: llc -mtriple=thumbv8 -run-pass=if-converter %s -o - | FileCheck %s --check-prefix=CHECK-V8
193 ; CHECK-V8-LABEL: name: test_nosize
194 ; CHECK-V8: bb.0 (%ir-block.0):
195 ; CHECK-V8: successors: %bb.1(0x50000000), %bb.6(0x30000000)
196 ; CHECK-V8: liveins: $lr, $r7
197 ; CHECK-V8: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
198 ; CHECK-V8: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
199 ; CHECK-V8: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
200 ; CHECK-V8: bb.1.b1:
201 ; CHECK-V8: successors: %bb.3(0x40000000), %bb.2(0x40000000)
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dinvalid-fp-armv8.s1 …N: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V8
11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
[all …]
Dbasic-thumb2-instructions-v8.s3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt #63 @ encoding: [0xbf,0xba]
18 @ CHECK-V8: it pl @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
24 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
33 @ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d]
52 @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80]
[all …]
Dbasic-arm-instructions-v8.s3 @ RUN: llvm-mc -triple armv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
10 @ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1]
16 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
27 @ CHECK-V8: dmb ishld @ encoding: [0x59,0xf0,0x7f,0xf5]
28 @ CHECK-V8: dmb oshld @ encoding: [0x51,0xf0,0x7f,0xf5]
29 @ CHECK-V8: dmb nshld @ encoding: [0x55,0xf0,0x7f,0xf5]
30 @ CHECK-V8: dmb ld @ encoding: [0x5d,0xf0,0x7f,0xf5]
44 @ CHECK-V8: dsb ishld @ encoding: [0x49,0xf0,0x7f,0xf5]
45 @ CHECK-V8: dsb oshld @ encoding: [0x41,0xf0,0x7f,0xf5]
[all …]
/external/llvm/test/MC/ARM/
Dinvalid-fp-armv8.s1 …N: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V8
11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
[all …]
Dbasic-thumb2-instructions-v8.s3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt #63 @ encoding: [0xbf,0xba]
18 @ CHECK-V8: it pl @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
24 @ CHECK-V8: hlt #24 @ encoding: [0x98,0xba]
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16 @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16 @ encoding: [0x03,0xea,0x2d,0x46]
33 @ CHECK-V8: and sp, r0, #0 @ encoding: [0x00,0xf0,0x00,0x0d]
42 @ CHECK-V8: dcps1 @ encoding: [0x8f,0xf7,0x01,0x80]
[all …]
Dbasic-arm-instructions-v8.s3 @ RUN: llvm-mc -triple armv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
9 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
10 @ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1]
16 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
27 @ CHECK-V8: dmb ishld @ encoding: [0x59,0xf0,0x7f,0xf5]
28 @ CHECK-V8: dmb oshld @ encoding: [0x51,0xf0,0x7f,0xf5]
29 @ CHECK-V8: dmb nshld @ encoding: [0x55,0xf0,0x7f,0xf5]
30 @ CHECK-V8: dmb ld @ encoding: [0x5d,0xf0,0x7f,0xf5]
44 @ CHECK-V8: dsb ishld @ encoding: [0x49,0xf0,0x7f,0xf5]
45 @ CHECK-V8: dsb oshld @ encoding: [0x41,0xf0,0x7f,0xf5]
[all …]
/external/llvm/test/CodeGen/SPARC/
Dfloat.ll1 ; RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-BE
2 ; RUN: llc -march=sparcel < %s | FileCheck %s -check-prefix=V8 -check-prefix=V8-EL
3 ; RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=V8-UNOPT
7 ; V8-LABEL: test_neg:
8 ; V8: call get_double
9 ; V8-BE: fnegs %f0, %f0
10 ; V8-EL: fnegs %f1, %f1
12 ; V8-UNOPT-LABEL: test_neg:
13 ; V8-UNOPT: fnegs
14 ; V8-UNOPT: ! implicit-def
[all …]
D2011-01-11-CC.ll1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
8 ; V8: addcc
9 ; V8-NOT: subcc
10 ; V8: addx
24 ; V8: test_select_int_icc
25 ; V8: cmp
26 ; V8: {{be|bne}}
39 ; V8: test_select_fp_icc
40 ; V8: cmp
41 ; V8: {{be|bne}}
[all …]
D2011-01-11-Call.ll2 ; RUN: llc -march=sparc <%s | FileCheck %s --check-prefix=V8
5 ; V8-LABEL: test
6 ; V8: save %sp
7 ; V8: call foo
8 ; V8-NEXT: nop
9 ; V8: call bar
10 ; V8-NEXT: nop
11 ; V8: ret
12 ; V8-NEXT: restore
35 ; V8-LABEL: test_tail_call_with_return
[all …]
D2011-01-11-FrameAddr.ll1 ;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
3 ;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
10 ;V8-LABEL: frameaddr:
11 ;V8: save %sp, -96, %sp
12 ;V8: ret
13 ;V8: restore %g0, %fp, %o0
33 ;V8-LABEL: frameaddr2:
34 ;V8: ta 3
35 ;V8: ld [%fp+56], {{.+}}
36 ;V8: ld [{{.+}}+56], {{.+}}
[all …]

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