| /external/vixl/test/aarch32/config/ |
| D | cond-dt-drt-drd-drn-drm-float.json | 35 "Vceq", // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; A2
36 // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; T2
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vicmp.ll | 4 ; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
|
| D | vfcmp.ll | 5 ; une is implemented with VCEQ/VMVN
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | vicmp.ll | 4 ; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
|
| D | vfcmp.ll | 5 ; une is implemented with VCEQ/VMVN
|
| /external/arm-neon-tests/ |
| D | ref-rvct-neon-nofp16.txt | 1343 VCEQ/VCEQQ output:
1344 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1345 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1346 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1347 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1348 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1349 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1350 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1351 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1352 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| D | ref-rvct-neon.txt | 1435 VCEQ/VCEQQ output:
1436 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1437 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1438 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1439 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1440 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1441 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1442 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1443 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1444 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| D | ref-rvct-all.txt | 1435 VCEQ/VCEQQ output:
1436 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1437 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1438 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1439 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1440 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1441 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1442 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1443 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1444 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 169 VCEQ, enumerator
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 96 VCEQ, // Vector compare equal. enumerator
|
| D | ARMScheduleSwift.td | 555 "VACLE", "VACLT", "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 218 VCEQ, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 220 VCEQ, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleR52.td | 794 (instregex "(VCEQ|VCGE|VCGT|VCLE|VCLT|VCLZ|VCMP|VCMPE|VCNT)")>;
|
| D | ARMScheduleSwift.td | 571 "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
|
| D | ARMScheduleA57.td | 1011 (instregex "VCEQ", "VCGE", "VCGT", "VCLE", "VTST", "VCLT")>;
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMScheduleR52.td | 794 (instregex "(VCEQ|VCGE|VCGT|VCLE|VCLT|VCLZ|VCMP|VCMPE|VCNT)")>;
|
| D | ARMScheduleSwift.td | 571 "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZScheduleZ13.td | 1311 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1312 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| D | SystemZScheduleZ15.td | 1371 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1372 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| D | SystemZScheduleZ14.td | 1333 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1334 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZScheduleZ13.td | 1311 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1312 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| D | SystemZScheduleZ14.td | 1333 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1334 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| D | SystemZScheduleZ15.td | 1371 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1372 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 4390 1107323817U, // VCEQ
7193 512U, // VCEQ
9996 6U, // VCEQ
11407 // VAC, VACCC, VAP, VCDG, VCDLG, VCEQ, VCGD, VCH, VCHL, VCLGD, VDP, VFA, ...
11425 // VAC, VACCC, VAP, VCDG, VCDLG, VCEQ, VCGD, VCH, VCHL, VCLGD, VDP, VFA, ...
|