| /external/pcre/dist2/src/ |
| D | pcre2_jit_neon_inc.h | 98 vect_t vc1 = VDUPQ(c1); in FF_FUN()
102 vect_t vc1 = VDUPQ(c1); in FF_FUN()
104 vect_t vc2 = VDUPQ(c2); in FF_FUN()
108 vect_t vc1 = VDUPQ(c1); in FF_FUN()
110 vect_t vmask = VDUPQ(mask); in FF_FUN()
122 cmp1a = VDUPQ(char1a); in FF_FUN()
123 cmp2a = VDUPQ(char2a); in FF_FUN()
124 cmp1b = VDUPQ(0); /* to avoid errors on older compilers -Werror=maybe-uninitialized */ in FF_FUN()
125 cmp2b = VDUPQ(0); /* to avoid errors on older compilers -Werror=maybe-uninitialized */ in FF_FUN()
131 cmp1a = VDUPQ(char1a); in FF_FUN()
[all …]
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| D | pcre2_jit_simd_inc.h | 794 # define VDUPQ vdupq_n_u8 macro
808 # define VDUPQ vdupq_n_u16 macro
822 # define VDUPQ vdupq_n_u32 macro
987 vect_t zero = VDUPQ(0); in shift_left_n_lanes()
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| /external/arm-neon-tests/ |
| D | ref-rvct-neon-nofp16.txt | 150 VDUP/VDUPQ output:
151 VDUP/VDUPQ:0:result_int8x8 [] = { fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffff…
152 VDUP/VDUPQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, }
153 VDUP/VDUPQ:2:result_int32x2 [] = { fffffff0, fffffff0, }
154 VDUP/VDUPQ:3:result_int64x1 [] = { fffffffffffffff0, }
155 VDUP/VDUPQ:4:result_uint8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
156 VDUP/VDUPQ:5:result_uint16x4 [] = { fff0, fff0, fff0, fff0, }
157 VDUP/VDUPQ:6:result_uint32x2 [] = { fffffff0, fffffff0, }
158 VDUP/VDUPQ:7:result_uint64x1 [] = { fffffffffffffff0, }
159 VDUP/VDUPQ:8:result_poly8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
[all …]
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| D | ref-rvct-neon.txt | 162 VDUP/VDUPQ output:
163 VDUP/VDUPQ:0:result_int8x8 [] = { fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffff…
164 VDUP/VDUPQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, }
165 VDUP/VDUPQ:2:result_int32x2 [] = { fffffff0, fffffff0, }
166 VDUP/VDUPQ:3:result_int64x1 [] = { fffffffffffffff0, }
167 VDUP/VDUPQ:4:result_uint8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
168 VDUP/VDUPQ:5:result_uint16x4 [] = { fff0, fff0, fff0, fff0, }
169 VDUP/VDUPQ:6:result_uint32x2 [] = { fffffff0, fffffff0, }
170 VDUP/VDUPQ:7:result_uint64x1 [] = { fffffffffffffff0, }
171 VDUP/VDUPQ:8:result_poly8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
[all …]
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| D | ref-rvct-all.txt | 162 VDUP/VDUPQ output:
163 VDUP/VDUPQ:0:result_int8x8 [] = { fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffffff0, fffff…
164 VDUP/VDUPQ:1:result_int16x4 [] = { fffffff0, fffffff0, fffffff0, fffffff0, }
165 VDUP/VDUPQ:2:result_int32x2 [] = { fffffff0, fffffff0, }
166 VDUP/VDUPQ:3:result_int64x1 [] = { fffffffffffffff0, }
167 VDUP/VDUPQ:4:result_uint8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
168 VDUP/VDUPQ:5:result_uint16x4 [] = { fff0, fff0, fff0, fff0, }
169 VDUP/VDUPQ:6:result_uint32x2 [] = { fffffff0, fffffff0, }
170 VDUP/VDUPQ:7:result_uint64x1 [] = { fffffffffffffff0, }
171 VDUP/VDUPQ:8:result_poly8x8 [] = { f0, f0, f0, f0, f0, f0, f0, f0, }
[all …]
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| D | expected_input4gcc-nofp16.txt | 148 VDUP/VDUPQ output:
172 VDUP/VDUPQ output:
196 VDUP/VDUPQ output:
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| D | expected_input4gcc.txt | 160 VDUP/VDUPQ output:
186 VDUP/VDUPQ output:
212 VDUP/VDUPQ output:
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 5980 class VDUPQ<bits<8> opcod1, bits<2> opcod3, string Dt, ValueType Ty>
5989 def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>;
5990 def VDUP16q : VDUPQ<0b11101010, 0b01, "16", v8i16>;
5991 def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 6493 class VDUPQ<bits<8> opcod1, bits<2> opcod3, string Dt, ValueType Ty>
6502 def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>;
6503 def VDUP16q : VDUPQ<0b11101010, 0b01, "16", v8i16>;
6504 def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 6527 class VDUPQ<bits<8> opcod1, bits<2> opcod3, string Dt, ValueType Ty>
6536 def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>;
6537 def VDUP16q : VDUPQ<0b11101010, 0b01, "16", v8i16>;
6538 def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>;
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