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Searched refs:VSC_PRIM_STRM_SIZE (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/freedreno/.gitlab-ci/reference/
Dcrash.log900 00000000 VSC_PRIM_STRM_SIZE[0].REG: 0
901 00000000 VSC_PRIM_STRM_SIZE[0x1].REG: 0
902 00000000 VSC_PRIM_STRM_SIZE[0x2].REG: 0
903 00000000 VSC_PRIM_STRM_SIZE[0x3].REG: 0
904 00000000 VSC_PRIM_STRM_SIZE[0x4].REG: 0
905 00000000 VSC_PRIM_STRM_SIZE[0x5].REG: 0
906 00000000 VSC_PRIM_STRM_SIZE[0x6].REG: 0
907 00000000 VSC_PRIM_STRM_SIZE[0x7].REG: 0
908 00000000 VSC_PRIM_STRM_SIZE[0x8].REG: 0
909 00000000 VSC_PRIM_STRM_SIZE[0x9].REG: 0
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/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_gmem.c317 #define VSC_PRIM_STRM_SIZE(pitch) ((pitch) * 32) macro
358 VSC_PRIM_STRM_SIZE(fd6_ctx->vsc_prim_strm_pitch), in update_vsc_pipe()