Searched refs:VSHLu (Results 1 – 11 of 11) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 143 VSHLu, // ...left/right by unsigned enumerator
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| D | ARMISelLowering.cpp | 1618 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName()
6106 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6126 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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| D | ARMInstrInfo.td | 280 def ARMvshlu : SDNode<"ARMISD::VSHLu", SDTARMVSH>;
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| D | ARMInstrNEON.td | 5838 defm VSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 0, N3RegVShFrm,
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 146 VSHLu, // ...left/right by unsigned enumerator
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| D | ARMISelLowering.cpp | 1684 case ARMISD::VSHLu: return "ARMISD::VSHLu"; in getTargetNodeName()
6299 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6319 (N->getOpcode() == ISD::SRA ? ARMISD::VSHLs : ARMISD::VSHLu); in LowerShift()
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| D | ARMInstrInfo.td | 287 def ARMvshlu : SDNode<"ARMISD::VSHLu", SDTARMVSH>;
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| D | ARMInstrNEON.td | 5836 defm VSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 0, N3RegVShFrm,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenFastISel.inc | 3305 // FastEmit functions for ARMISD::VSHLu.
5485 case ARMISD::VSHLu: return fastEmit_ARMISD_VSHLu_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | ARMGenDAGISel.inc | 62489 /*137510*/ /*SwitchOpcode*/ 70|128,2/*326*/, TARGET_VAL(ARMISD::VSHLu),// ->137840
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 5417 defm VSHLu : N3VInt_QHSDSh<1, 0, 0b0100, 0, N3RegVShFrm,
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