/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMInstrMVE.td | 321 multiclass MVE_TwoOpPattern<MVEVectorVTInfo VTI, PatFrag Op, Intrinsic PredInt, 325 def : Pat<(VTI.Vec (Op (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn))), 326 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn)))>; 329 if !ne(VTI.Size, 0b11) then { 330 def : Pat<(VTI.Vec (vselect (VTI.Pred VCCR:$mask), 331 (VTI.Vec (Op (VTI.Vec MQPR:$Qm), 332 (VTI.Vec MQPR:$Qn))), 333 (VTI.Vec MQPR:$inactive))), 334 (VTI.Vec (Inst (VTI.Vec MQPR:$Qm), (VTI.Vec MQPR:$Qn), 335 ARMVCCThen, (VTI.Pred VCCR:$mask), [all …]
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D | ARMInstrCDE.td | 610 multiclass VCXPredicatedPat_m<MVEVectorVTInfo VTI> { 611 def : Pat<(VTI.Vec (int_arm_cde_vcx1q_predicated timm:$coproc, 612 (VTI.Vec MQPR:$inactive), timm:$imm, 613 (VTI.Pred VCCR:$pred))), 614 (VTI.Vec (CDE_VCX1_vec p_imm:$coproc, imm_12b:$imm, ARMVCCThen, 615 (VTI.Pred VCCR:$pred), 616 (VTI.Vec MQPR:$inactive)))>; 617 def : Pat<(VTI.Vec (int_arm_cde_vcx1qa_predicated timm:$coproc, 618 (VTI.Vec MQPR:$acc), timm:$imm, 619 (VTI.Pred VCCR:$pred))), [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMInstrMVE.td | 595 multiclass MVE_VABAV_m<MVEVectorVTInfo VTI> { 596 def "" : MVE_VABAV<VTI.Suffix, VTI.Unsigned, VTI.Size>; 601 (i32 VTI.Unsigned), 603 (VTI.Vec MQPR:$Qn), (VTI.Vec MQPR:$Qm))), 605 (VTI.Vec MQPR:$Qn), (VTI.Vec MQPR:$Qm)))>; 608 (i32 VTI.Unsigned), 610 (VTI.Vec MQPR:$Qn), (VTI.Vec MQPR:$Qm), 611 (VTI.Pred VCCR:$mask))), 613 (VTI.Vec MQPR:$Qn), (VTI.Vec MQPR:$Qm), 614 ARMVCCThen, (VTI.Pred VCCR:$mask)))>; [all …]
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/external/compiler-rt/lib/ubsan/ |
D | ubsan_type_hash_itanium.cc | 127 const abi::__vmi_class_type_info *VTI = in isDerivedFromAtOffset() local 129 if (!VTI) in isDerivedFromAtOffset() 134 for (unsigned int base = 0; base != VTI->base_count; ++base) { in isDerivedFromAtOffset() 137 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in isDerivedFromAtOffset() 139 if (VTI->base_info[base].__offset_flags & in isDerivedFromAtOffset() 145 if (isDerivedFromAtOffset(VTI->base_info[base].__base_type, in isDerivedFromAtOffset() 164 const abi::__vmi_class_type_info *VTI = in findBaseAtOffset() local 166 if (!VTI) in findBaseAtOffset() 170 for (unsigned int base = 0; base != VTI->base_count; ++base) { in findBaseAtOffset() 171 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in findBaseAtOffset() [all …]
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/external/llvm-project/compiler-rt/lib/ubsan/ |
D | ubsan_type_hash_itanium.cpp | 128 const abi::__vmi_class_type_info *VTI = in isDerivedFromAtOffset() local 130 if (!VTI) in isDerivedFromAtOffset() 135 for (unsigned int base = 0; base != VTI->base_count; ++base) { in isDerivedFromAtOffset() 138 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in isDerivedFromAtOffset() 140 if (VTI->base_info[base].__offset_flags & in isDerivedFromAtOffset() 146 if (isDerivedFromAtOffset(VTI->base_info[base].__base_type, in isDerivedFromAtOffset() 165 const abi::__vmi_class_type_info *VTI = in findBaseAtOffset() local 167 if (!VTI) in findBaseAtOffset() 171 for (unsigned int base = 0; base != VTI->base_count; ++base) { in findBaseAtOffset() 172 sptr OffsetHere = VTI->base_info[base].__offset_flags >> in findBaseAtOffset() [all …]
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 11766 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> { 11768 ExeDomain = VTI.ExeDomain in { 11769 defm r: AVX512_maskable_3src<Op, MRMSrcReg, VTI, (outs VTI.RC:$dst), 11770 (ins VTI.RC:$src2, VTI.RC:$src3), OpStr, 11772 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, VTI.RC:$src3))>, 11774 defm m: AVX512_maskable_3src<Op, MRMSrcMem, VTI, (outs VTI.RC:$dst), 11775 (ins VTI.RC:$src2, VTI.MemOp:$src3), OpStr, 11777 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, 11778 (VTI.VT (VTI.LdFrag addr:$src3))))>, 11785 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrAVX512.td | 11770 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> { 11772 ExeDomain = VTI.ExeDomain in { 11773 defm r: AVX512_maskable_3src<Op, MRMSrcReg, VTI, (outs VTI.RC:$dst), 11774 (ins VTI.RC:$src2, VTI.RC:$src3), OpStr, 11776 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, VTI.RC:$src3))>, 11778 defm m: AVX512_maskable_3src<Op, MRMSrcMem, VTI, (outs VTI.RC:$dst), 11779 (ins VTI.RC:$src2, VTI.MemOp:$src3), OpStr, 11781 (VTI.VT (OpNode VTI.RC:$src1, VTI.RC:$src2, 11782 (VTI.VT (VTI.LdFrag addr:$src3))))>, 11789 X86FoldableSchedWrite sched, X86VectorVTInfo VTI> [all …]
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/external/clang/lib/AST/ |
D | DeclBase.cpp | 457 VersionTuple VTI(A->getIntroduced()); in CheckAvailability() local 458 VTI.UseDotAsSeparator(); in CheckAvailability() 460 << VTI << HintMessage; in CheckAvailability()
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/external/llvm-project/clang/lib/AST/ |
D | DeclBase.cpp | 585 VersionTuple VTI(A->getIntroduced()); in CheckAvailability() local 587 << VTI << HintMessage; in CheckAvailability()
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/external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
D | 2013-1_UNLOCODE_CodeListPart2.csv | 15588 ,"IT","VTI","Voltri","Voltri",,"1-------","RQ","9512",,,
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D | 2013-1_UNLOCODE_CodeListPart1.csv | 16229 ,"CZ","VTI","Vetrn�","Vetrni","JC","--3-----","RL","0701",,"4846N 01417E", 41971 ,"FR","VTI","Saint-Valentin","Saint-Valentin","36","1-------","RQ","1101",,,""
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D | 2013-1_UNLOCODE_CodeListPart3.csv | 26009 ,"US","VTI","Vista","Vista","CA","--3-----","RQ","9307",,,
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