Searched refs:WideRegs (Results 1 – 4 of 4) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPULegalizerInfo.cpp | 2306 SmallVector<Register, 4> WideRegs; in handleD16VData() local 2308 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData() 2312 return B.buildBuildVector(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
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D | AMDGPURegisterBankInfo.cpp | 1272 SmallVector<Register, 4> WideRegs; in handleD16VData() local 1274 WideRegs.push_back(Unmerge.getReg(I)); in handleD16VData() 1279 return B.buildMerge(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | AMDGPURegisterBankInfo.cpp | 1693 SmallVector<Register, 4> WideRegs; in handleD16VData() local 1695 WideRegs.push_back(Unmerge.getReg(I)); in handleD16VData() 1700 return B.buildMerge(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
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D | AMDGPULegalizerInfo.cpp | 3540 SmallVector<Register, 4> WideRegs; in handleD16VData() local 3542 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData() 3546 return B.buildBuildVector(LLT::vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
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