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Searched refs:_mm256_shuffle_epi32 (Results 1 – 25 of 40) sorted by relevance

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/external/tensorflow/third_party/eigen3/unsupported/Eigen/CXX11/src/FixedPoint/
DPacketMathAVX2.h439 _mm256_min_epi32(tmp, _mm256_shuffle_epi32(tmp, _MM_SHUFFLE(1, 0, 3, 2)));
441 _mm256_min_epi32(tmp, _mm256_shuffle_epi32(tmp, 1)));
447 _mm256_max_epi32(tmp, _mm256_shuffle_epi32(tmp, _MM_SHUFFLE(1, 0, 3, 2)));
449 _mm256_max_epi32(tmp, _mm256_shuffle_epi32(tmp, 1)));
456 _mm256_min_epi16(tmp, _mm256_shuffle_epi32(tmp, _MM_SHUFFLE(1, 0, 3, 2)));
457 tmp = _mm256_min_epi16(tmp, _mm256_shuffle_epi32(tmp, 1));
464 _mm256_max_epi16(tmp, _mm256_shuffle_epi32(tmp, _MM_SHUFFLE(1, 0, 3, 2)));
465 tmp = _mm256_max_epi16(tmp, _mm256_shuffle_epi32(tmp, 1));
473 _mm256_min_epu8(tmp, _mm256_shuffle_epi32(tmp, _MM_SHUFFLE(1, 0, 3, 2)));
474 tmp = _mm256_min_epu8(tmp, _mm256_shuffle_epi32(tmp, 1));
[all …]
/external/libaom/libaom/av1/encoder/x86/
Dencodetxb_avx2.c47 const __m256i res_ = _mm256_shuffle_epi32(abs01_8, 0xd8); in av1_txb_init_levels_avx2()
66 const __m256i res = _mm256_shuffle_epi32(res_, 0xd8); in av1_txb_init_levels_avx2()
93 const __m256i res = _mm256_shuffle_epi32(res_, 0xd8); in av1_txb_init_levels_avx2()
114 const __m256i res = _mm256_shuffle_epi32(res_, 0xd8); in av1_txb_init_levels_avx2()
Dav1_highbd_quantize_avx2.c127 eob_s = _mm256_shuffle_epi32(eob, 0xe); in av1_highbd_quantize_fp_avx2()
/external/ruy/ruy/
Dkernel_avx2_fma.cc313 tmp0 = _mm256_shuffle_epi32(rhs0_3, 0);
314 tmp1 = _mm256_shuffle_epi32(rhs0_3, 0x55);
316 tmp2 = _mm256_shuffle_epi32(rhs0_3, 0xaa);
317 tmp3 = _mm256_shuffle_epi32(rhs0_3, 0xff);
320 tmp0 = _mm256_shuffle_epi32(rhs4_7, 0);
321 tmp1 = _mm256_shuffle_epi32(rhs4_7, 0x55);
323 tmp2 = _mm256_shuffle_epi32(rhs4_7, 0xaa);
324 tmp3 = _mm256_shuffle_epi32(rhs4_7, 0xff);
327 tmp0 = _mm256_shuffle_epi32(rhs8_11, 0);
328 tmp1 = _mm256_shuffle_epi32(rhs8_11, 0x55);
[all …]
/external/libaom/libaom/av1/common/x86/
Dwiener_convolve_avx2.c107 coeffs_v[0] = _mm256_shuffle_epi32(filter_coeffs_y, 0x00); in av1_wiener_convolve_add_src_avx2()
109 coeffs_v[1] = _mm256_shuffle_epi32(filter_coeffs_y, 0x55); in av1_wiener_convolve_add_src_avx2()
111 coeffs_v[2] = _mm256_shuffle_epi32(filter_coeffs_y, 0xaa); in av1_wiener_convolve_add_src_avx2()
113 coeffs_v[3] = _mm256_shuffle_epi32(filter_coeffs_y, 0xff); in av1_wiener_convolve_add_src_avx2()
/external/XNNPACK/src/qs8-igemm/gen/
D3x8c8-minmax-avx2.c156 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
157 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
158 const __m256i vacc2x11335577 = _mm256_shuffle_epi32(vacc2x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
D2x8c8-minmax-avx2.c133 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_2x8c8__avx2()
134 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_2x8c8__avx2()
D1x8c8-minmax-avx2.c110 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_igemm_minmax_ukernel_1x8c8__avx2()
/external/XNNPACK/src/qs8-gemm/gen/
D3x8c8-minmax-avx2.c139 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
140 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
141 const __m256i vacc2x11335577 = _mm256_shuffle_epi32(vacc2x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
D3x8c8-xw-minmax-avx2.c135 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
136 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
137 const __m256i vacc2x11335577 = _mm256_shuffle_epi32(vacc2x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
D2x8c8-minmax-avx2.c118 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_2x8c8__avx2()
119 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_2x8c8__avx2()
D2x8c8-xw-minmax-avx2.c114 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_2x8c8__avx2()
115 const __m256i vacc1x11335577 = _mm256_shuffle_epi32(vacc1x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_2x8c8__avx2()
D1x8c8-minmax-avx2.c97 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_minmax_ukernel_1x8c8__avx2()
D1x8c8-xw-minmax-avx2.c93 const __m256i vacc0x11335577 = _mm256_shuffle_epi32(vacc0x01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_gemm_xw_minmax_ukernel_1x8c8__avx2()
/external/libaom/libaom/aom_dsp/x86/
Dconvolve_avx2.h308 coeffs[0] = _mm256_shuffle_epi32(coeff, 0x00); in prepare_coeffs()
310 coeffs[1] = _mm256_shuffle_epi32(coeff, 0x55); in prepare_coeffs()
312 coeffs[2] = _mm256_shuffle_epi32(coeff, 0xaa); in prepare_coeffs()
314 coeffs[3] = _mm256_shuffle_epi32(coeff, 0xff); in prepare_coeffs()
Dmasked_sad_intrin_avx2.c62 res = _mm256_shuffle_epi32(res, 0xd8); in masked_sad32xh_avx2()
115 res = _mm256_shuffle_epi32(res, 0xd8); in masked_sad16xh_avx2()
Dhighbd_quantize_intrin_avx2.c150 eob_s = _mm256_shuffle_epi32(eob, 0xe); in aom_highbd_quantize_b_avx2()
/external/XNNPACK/src/qs8-dwconv/gen/
Dup32x9-minmax-avx2-mul16.c229 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
230 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
231 const __m256i vaccHJLN = _mm256_shuffle_epi32(vaccGHIJKLMN, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
232 const __m256i vaccPRTV = _mm256_shuffle_epi32(vaccOPQRSTUV, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
388 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
389 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
Dup16x9-minmax-avx2-mul16.c173 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
174 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
296 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
297 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
Dup32x9-minmax-avx2-mul32.c229 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
230 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
231 const __m256i vaccHJLN = _mm256_shuffle_epi32(vaccGHIJKLMN, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
232 const __m256i vaccPRTV = _mm256_shuffle_epi32(vaccOPQRSTUV, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
360 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
Dup24x9-minmax-avx2-mul32.c201 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
202 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
203 const __m256i vaccHJLN = _mm256_shuffle_epi32(vaccGHIJKLMN, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
322 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
Dup16x9-minmax-avx2-mul32.c173 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul32()
174 const __m256i vacc9BDF = _mm256_shuffle_epi32(vacc89ABCDEF, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul32()
280 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul32()
Dup8x9-minmax-avx2-mul32.c145 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up8x9__avx2_mul32()
230 const __m256i vacc1357 = _mm256_shuffle_epi32(vacc01234567, _MM_SHUFFLE(3, 3, 1, 1)); in xnn_qs8_dwconv_minmax_ukernel_up8x9__avx2_mul32()
/external/libvpx/libvpx/vpx_dsp/x86/
Dhighbd_convolve_avx2.c966 kernel_reg_23 = _mm256_shuffle_epi32(kernel_reg, 0x55); in vpx_highbd_filter_block1d4_h4_avx2()
967 kernel_reg_45 = _mm256_shuffle_epi32(kernel_reg, 0xaa); in vpx_highbd_filter_block1d4_h4_avx2()
1053 kernel_reg_23 = _mm256_shuffle_epi32(kernel_reg, 0x55); in vpx_highbd_filter_block1d8_h4_avx2()
1054 kernel_reg_45 = _mm256_shuffle_epi32(kernel_reg, 0xaa); in vpx_highbd_filter_block1d8_h4_avx2()
1282 kernel_reg_23 = _mm256_shuffle_epi32(kernel_reg, 0x55); in vpx_highbd_filter_block1d4_v4_avx2()
1283 kernel_reg_45 = _mm256_shuffle_epi32(kernel_reg, 0xaa); in vpx_highbd_filter_block1d4_v4_avx2()
1367 kernel_reg_23 = _mm256_shuffle_epi32(kernel_reg, 0x55); in vpx_highbd_filter_block1d8_v4_avx2()
1368 kernel_reg_45 = _mm256_shuffle_epi32(kernel_reg, 0xaa); in vpx_highbd_filter_block1d8_v4_avx2()
/external/XNNPACK/src/qs8-dwconv/
Dunipass-avx2-mul16.c.in70 …const __m256i vacc${ABC[C+1:C+8:2]} = _mm256_shuffle_epi32(vacc${ABC[C:C+8]}, _MM_SHUFFLE(3, 3, 1,…
143 … const __m256i vacc${ABC[1:8:2]} = _mm256_shuffle_epi32(vacc${ABC[0:8]}, _MM_SHUFFLE(3, 3, 1, 1));
144 …const __m256i vacc${ABC[9:16:2]} = _mm256_shuffle_epi32(vacc${ABC[8:16]}, _MM_SHUFFLE(3, 3, 1, 1));

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