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Searched refs:_mm256_sra_epi32 (Results 1 – 25 of 44) sorted by relevance

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/external/XNNPACK/src/qs8-vaddc/gen/
Dminmax-avx2-mul32-ld64-x32.c53 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x32()
54 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x32()
55 …vaccGHIJKLMN = _mm256_sub_epi32(_mm256_sra_epi32(vaccGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHI… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x32()
56 …vaccOPQRSTUV = _mm256_sub_epi32(_mm256_sra_epi32(vaccOPQRSTUV, vshift), _mm256_cmpgt_epi32(vremOPQ… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x32()
80 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x32()
Dminmax-avx2-mul32-ld64-x24.c50 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x24()
51 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x24()
52 …vaccGHIJKLMN = _mm256_sub_epi32(_mm256_sra_epi32(vaccGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHI… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x24()
76 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x24()
Dminmax-avx2-mul32-ld64-x16.c47 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x16()
48 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x16()
68 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x16()
Dminmax-avx2-mul32-ld64-x8.c44 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x8()
63 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vaddc_minmax_ukernel__avx2_mul32_ld64_x8()
/external/XNNPACK/src/qs8-vadd/gen/
Dminmax-avx2-mul32-ld64-x32.c62 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x32()
63 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x32()
64 …vaccGHIJKLMN = _mm256_sub_epi32(_mm256_sra_epi32(vaccGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHI… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x32()
65 …vaccOPQRSTUV = _mm256_sub_epi32(_mm256_sra_epi32(vaccOPQRSTUV, vshift), _mm256_cmpgt_epi32(vremOPQ… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x32()
93 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x32()
Dminmax-avx2-mul32-ld64-x24.c57 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x24()
58 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x24()
59 …vaccGHIJKLMN = _mm256_sub_epi32(_mm256_sra_epi32(vaccGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHI… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x24()
87 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x24()
Dminmax-avx2-mul32-ld64-x16.c52 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x16()
53 …vacc89ABCDEF = _mm256_sub_epi32(_mm256_sra_epi32(vacc89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89A… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x16()
77 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x16()
Dminmax-avx2-mul32-ld64-x8.c47 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x8()
69 …vacc01234567 = _mm256_sub_epi32(_mm256_sra_epi32(vacc01234567, vshift), _mm256_cmpgt_epi32(vrem012… in xnn_qs8_vadd_minmax_ukernel__avx2_mul32_ld64_x8()
/external/libaom/libaom/av1/common/x86/
Dhighbd_convolve_2d_avx2.c85 res_even = _mm256_sra_epi32(_mm256_add_epi32(res_even, round_const_x), in av1_highbd_convolve_2d_sr_avx2()
95 res_odd = _mm256_sra_epi32(_mm256_add_epi32(res_odd, round_const_x), in av1_highbd_convolve_2d_sr_avx2()
135 __m256i res_a_round = _mm256_sra_epi32( in av1_highbd_convolve_2d_sr_avx2()
138 res_a_round = _mm256_sra_epi32( in av1_highbd_convolve_2d_sr_avx2()
143 __m256i res_b_round = _mm256_sra_epi32( in av1_highbd_convolve_2d_sr_avx2()
146 _mm256_sra_epi32(_mm256_add_epi32(res_b_round, round_const_bits), in av1_highbd_convolve_2d_sr_avx2()
Dconvolve_2d_avx2.c145 _mm256_sra_epi32(_mm256_add_epi32(res_a, sum_round_v), sum_shift_v); in av1_convolve_2d_sr_avx2()
147 _mm256_sra_epi32(_mm256_add_epi32(res_b, sum_round_v), sum_shift_v); in av1_convolve_2d_sr_avx2()
149 const __m256i res_a_round = _mm256_sra_epi32( in av1_convolve_2d_sr_avx2()
151 const __m256i res_b_round = _mm256_sra_epi32( in av1_convolve_2d_sr_avx2()
Djnt_convolve_avx2.c279 const __m256i res_lo_0_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
285 const __m256i res_lo_1_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
337 const __m256i res_hi_0_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
343 const __m256i res_hi_1_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
458 const __m256i res_lo_0_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
464 const __m256i res_lo_1_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
516 const __m256i res_hi_0_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
522 const __m256i res_hi_1_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_y_avx2()
710 const __m256i res_a_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_2d_avx2()
715 const __m256i res_b_round = _mm256_sra_epi32( in av1_dist_wtd_convolve_2d_avx2()
Dwiener_convolve_avx2.c182 const __m256i res_a_round = _mm256_sra_epi32( in av1_wiener_convolve_add_src_avx2()
184 const __m256i res_b_round = _mm256_sra_epi32( in av1_wiener_convolve_add_src_avx2()
226 const __m256i res_round = _mm256_sra_epi32( in av1_wiener_convolve_add_src_avx2()
Dhighbd_jnt_convolve_avx2.c304 res_even = _mm256_sra_epi32(_mm256_add_epi32(res_even, round_const_x), in av1_highbd_dist_wtd_convolve_2d_avx2()
314 res_odd = _mm256_sra_epi32(_mm256_add_epi32(res_odd, round_const_x), in av1_highbd_dist_wtd_convolve_2d_avx2()
355 const __m256i res_a_round = _mm256_sra_epi32( in av1_highbd_dist_wtd_convolve_2d_avx2()
402 const __m256i res_b_round = _mm256_sra_epi32( in av1_highbd_dist_wtd_convolve_2d_avx2()
527 res_even = _mm256_sra_epi32(_mm256_add_epi32(res_even, round_const_x), in av1_highbd_dist_wtd_convolve_x_avx2()
537 res_odd = _mm256_sra_epi32(_mm256_add_epi32(res_odd, round_const_x), in av1_highbd_dist_wtd_convolve_x_avx2()
750 res_a_round = _mm256_sra_epi32( in av1_highbd_dist_wtd_convolve_y_avx2()
797 res_b_round = _mm256_sra_epi32( in av1_highbd_dist_wtd_convolve_y_avx2()
/external/flac/src/libFLAC/
Dlpc_intrin_avx2.c92 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
123 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
154 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
181 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
210 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
233 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
256 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
275 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
296 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
311 summ = _mm256_sra_epi32(summ, cnt); in FLAC__lpc_compute_residual_from_qlp_coefficients_16_intrin_avx2()
[all …]
/external/libaom/libaom/aom_dsp/x86/
Dconvolve_avx2.h117 _mm256_sra_epi32(_mm256_add_epi32(res_a, sum_round_v), sum_shift_v); \
119 _mm256_sra_epi32(_mm256_add_epi32(res_b, sum_round_v), sum_shift_v); \
121 const __m256i res_a_round = _mm256_sra_epi32( \
123 const __m256i res_b_round = _mm256_sra_epi32( \
196 const __m256i res_a_round = _mm256_sra_epi32( \
201 const __m256i res_b_round = _mm256_sra_epi32( \
Dhighbd_convolve_avx2.c215 __m256i res_a_round = _mm256_sra_epi32( in av1_highbd_convolve_y_sr_avx2()
220 __m256i res_b_round = _mm256_sra_epi32( in av1_highbd_convolve_y_sr_avx2()
316 res_even = _mm256_sra_epi32(_mm256_add_epi32(res_even, round_const_x), in av1_highbd_convolve_x_sr_avx2()
326 res_odd = _mm256_sra_epi32(_mm256_add_epi32(res_odd, round_const_x), in av1_highbd_convolve_x_sr_avx2()
329 res_even = _mm256_sra_epi32(_mm256_add_epi32(res_even, round_const_bits), in av1_highbd_convolve_x_sr_avx2()
331 res_odd = _mm256_sra_epi32(_mm256_add_epi32(res_odd, round_const_bits), in av1_highbd_convolve_x_sr_avx2()
1109 __m256i res_a_round = _mm256_sra_epi32( in aom_highbd_filter_block1d4_v4_avx2()
1170 __m256i res_a_round = _mm256_sra_epi32( in aom_highbd_filter_block1d8_v4_avx2()
1174 __m256i res_b_round = _mm256_sra_epi32( in aom_highbd_filter_block1d8_v4_avx2()
/external/XNNPACK/src/qs8-igemm/gen/
D3x8c8-minmax-avx2.c190 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod0x01234567, vshift), _mm256_cmpgt_epi32(vrem0x01234567, … in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
192 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod1x01234567, vshift), _mm256_cmpgt_epi32(vrem1x01234567, … in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
194 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod2x01234567, vshift), _mm256_cmpgt_epi32(vrem2x01234567, … in xnn_qs8_igemm_minmax_ukernel_3x8c8__avx2()
/external/XNNPACK/src/qs8-gemm/gen/
D3x8c8-minmax-avx2.c173 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod0x01234567, vshift), _mm256_cmpgt_epi32(vrem0x01234567, … in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
175 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod1x01234567, vshift), _mm256_cmpgt_epi32(vrem1x01234567, … in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
177 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod2x01234567, vshift), _mm256_cmpgt_epi32(vrem2x01234567, … in xnn_qs8_gemm_minmax_ukernel_3x8c8__avx2()
D3x8c8-xw-minmax-avx2.c169 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod0x01234567, vshift), _mm256_cmpgt_epi32(vrem0x01234567, … in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
171 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod1x01234567, vshift), _mm256_cmpgt_epi32(vrem1x01234567, … in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
173 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod2x01234567, vshift), _mm256_cmpgt_epi32(vrem2x01234567, … in xnn_qs8_gemm_xw_minmax_ukernel_3x8c8__avx2()
D2x8c8-minmax-avx2.c144 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod0x01234567, vshift), _mm256_cmpgt_epi32(vrem0x01234567, … in xnn_qs8_gemm_minmax_ukernel_2x8c8__avx2()
146 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod1x01234567, vshift), _mm256_cmpgt_epi32(vrem1x01234567, … in xnn_qs8_gemm_minmax_ukernel_2x8c8__avx2()
D2x8c8-xw-minmax-avx2.c140 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod0x01234567, vshift), _mm256_cmpgt_epi32(vrem0x01234567, … in xnn_qs8_gemm_xw_minmax_ukernel_2x8c8__avx2()
142 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod1x01234567, vshift), _mm256_cmpgt_epi32(vrem1x01234567, … in xnn_qs8_gemm_xw_minmax_ukernel_2x8c8__avx2()
/external/XNNPACK/src/qs8-dwconv/gen/
Dup32x9-minmax-avx2-mul16.c270 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
272 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
274 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prodGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHIJKLMN, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
276 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prodOPQRSTUV, vshift), _mm256_cmpgt_epi32(vremOPQRSTUV, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
413 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
415 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul16()
Dup16x9-minmax-avx2-mul16.c198 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
200 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
321 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
323 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up16x9__avx2_mul16()
Dup32x9-minmax-avx2-mul32.c270 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
272 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
274 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prodGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHIJKLMN, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
276 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prodOPQRSTUV, vshift), _mm256_cmpgt_epi32(vremOPQRSTUV, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
377 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up32x9__avx2_mul32()
Dup24x9-minmax-avx2-mul32.c234 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
236 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod89ABCDEF, vshift), _mm256_cmpgt_epi32(vrem89ABCDEF, vrem… in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
238 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prodGHIJKLMN, vshift), _mm256_cmpgt_epi32(vremGHIJKLMN, vrem… in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()
339 …_mm256_sub_epi32(_mm256_sra_epi32(vq31prod01234567, vshift), _mm256_cmpgt_epi32(vrem01234567, vrem… in xnn_qs8_dwconv_minmax_ukernel_up24x9__avx2_mul32()

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