| /external/XNNPACK/src/f32-prelu/gen/ |
| D | avx512f-2x32.c | 61 …const __m512 vacc0x0123456789ABCDEF = _mm512_mask_mul_ps(vi0x0123456789ABCDEF, vsign0x0123456789AB… in xnn_f32_prelu_ukernel__avx512f_2x32()
63 …const __m512 vacc0xGHIJKLMNOPQRSTUV = _mm512_mask_mul_ps(vi0xGHIJKLMNOPQRSTUV, vsign0xGHIJKLMNOPQR… in xnn_f32_prelu_ukernel__avx512f_2x32()
65 …const __m512 vacc1x0123456789ABCDEF = _mm512_mask_mul_ps(vi1x0123456789ABCDEF, vsign1x0123456789AB… in xnn_f32_prelu_ukernel__avx512f_2x32()
67 …const __m512 vacc1xGHIJKLMNOPQRSTUV = _mm512_mask_mul_ps(vi1xGHIJKLMNOPQRSTUV, vsign1xGHIJKLMNOPQR… in xnn_f32_prelu_ukernel__avx512f_2x32()
86 const __m512 vacc0 = _mm512_mask_mul_ps(vi0, vsign0, vi0, vw); in xnn_f32_prelu_ukernel__avx512f_2x32()
88 const __m512 vacc1 = _mm512_mask_mul_ps(vi1, vsign1, vi1, vw); in xnn_f32_prelu_ukernel__avx512f_2x32()
109 const __m512 vacc0 = _mm512_mask_mul_ps(vi0, vsign0, vi0, vw); in xnn_f32_prelu_ukernel__avx512f_2x32()
111 const __m512 vacc1 = _mm512_mask_mul_ps(vi1, vsign1, vi1, vw); in xnn_f32_prelu_ukernel__avx512f_2x32()
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| D | avx512f-2x16.c | 58 …const __m512 vacc0x0123456789ABCDEF = _mm512_mask_mul_ps(vi0x0123456789ABCDEF, vsign0x0123456789AB… in xnn_f32_prelu_ukernel__avx512f_2x16()
60 …const __m512 vacc1x0123456789ABCDEF = _mm512_mask_mul_ps(vi1x0123456789ABCDEF, vsign1x0123456789AB… in xnn_f32_prelu_ukernel__avx512f_2x16()
81 const __m512 vacc0 = _mm512_mask_mul_ps(vi0, vsign0, vi0, vw); in xnn_f32_prelu_ukernel__avx512f_2x16()
83 const __m512 vacc1 = _mm512_mask_mul_ps(vi1, vsign1, vi1, vw); in xnn_f32_prelu_ukernel__avx512f_2x16()
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| /external/XNNPACK/src/f32-vlrelu/gen/ |
| D | vlrelu-avx512f-x32.c | 39 …vacc0123456789ABCDEF = _mm512_mask_mul_ps(vacc0123456789ABCDEF, vsign0123456789ABCDEF, vacc0123456… in xnn_f32_vlrelu_ukernel__avx512f_x32()
40 …vaccGHIJKLMNOPQRSTUV = _mm512_mask_mul_ps(vaccGHIJKLMNOPQRSTUV, vsignGHIJKLMNOPQRSTUV, vaccGHIJKLM… in xnn_f32_vlrelu_ukernel__avx512f_x32()
50 vacc = _mm512_mask_mul_ps(vacc, vsign, vacc, vslope); in xnn_f32_vlrelu_ukernel__avx512f_x32()
63 vacc = _mm512_mask_mul_ps(vacc, vsign, vacc, vslope); in xnn_f32_vlrelu_ukernel__avx512f_x32()
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| D | vlrelu-avx512f-x16.c | 37 …vacc0123456789ABCDEF = _mm512_mask_mul_ps(vacc0123456789ABCDEF, vsign0123456789ABCDEF, vacc0123456… in xnn_f32_vlrelu_ukernel__avx512f_x16()
51 vacc = _mm512_mask_mul_ps(vacc, vsign, vacc, vslope); in xnn_f32_vlrelu_ukernel__avx512f_x16()
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| /external/XNNPACK/src/f32-velu/gen/ |
| D | velu-avx512f-rr1-lut16-p3-perm-x128.c | 176 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
177 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
178 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
179 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
180 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
181 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
182 vy6 = _mm512_mask_mul_ps(vy6, vsign6, vx6, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
183 vy7 = _mm512_mask_mul_ps(vy7, vsign7, vx7, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
218 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
251 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
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| D | velu-avx512f-rr1-lut16-p3-perm-x112.c | 161 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
162 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
163 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
164 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
165 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
166 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
167 vy6 = _mm512_mask_mul_ps(vy6, vsign6, vx6, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
201 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
234 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
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| D | velu-avx512f-rr1-p6-x128.c | 186 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
187 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
188 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
189 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
190 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
191 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
192 vy6 = _mm512_mask_mul_ps(vy6, vsign6, vx6, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
193 vy7 = _mm512_mask_mul_ps(vy7, vsign7, vx7, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
229 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
263 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x128()
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| D | velu-avx512f-rr1-lut16-p3-perm-x80.c | 131 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
132 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
133 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
134 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
135 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
167 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
200 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x80()
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| D | velu-avx512f-rr1-lut16-p3-perm-x96.c | 146 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
147 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
148 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
149 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
150 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
151 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
184 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
217 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
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| D | velu-avx512f-rr1-p6-x96.c | 154 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
155 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
156 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
157 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
158 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
159 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
193 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
227 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x96()
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| D | velu-avx512f-rr1-p6-x112.c | 170 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
171 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
172 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
173 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
174 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
175 vy5 = _mm512_mask_mul_ps(vy5, vsign5, vx5, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
176 vy6 = _mm512_mask_mul_ps(vy6, vsign6, vx6, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
211 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
245 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x112()
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| D | velu-avx512f-rr1-p6-x80.c | 138 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
139 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
140 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
141 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
142 vy4 = _mm512_mask_mul_ps(vy4, vsign4, vx4, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
175 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
209 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x80()
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| D | velu-avx512f-rr1-p6-x64.c | 122 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
123 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
124 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
125 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
157 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
191 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x64()
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| D | velu-avx512f-rr1-lut16-p3-perm-x64.c | 116 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
117 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
118 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
119 vy3 = _mm512_mask_mul_ps(vy3, vsign3, vx3, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
150 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
183 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x64()
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| D | velu-avx512f-rr1-lut16-p3-perm-x48.c | 101 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48()
102 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48()
103 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48()
133 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48()
166 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x48()
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| D | velu-avx512f-rr1-p6-x48.c | 106 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x48()
107 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x48()
108 vy2 = _mm512_mask_mul_ps(vy2, vsign2, vx2, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x48()
139 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x48()
173 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x48()
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| D | velu-avx512f-rr1-lut16-p3-perm-x32.c | 86 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32()
87 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32()
116 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32()
149 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x32()
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| D | velu-avx512f-rr1-p6-x32.c | 90 vy0 = _mm512_mask_mul_ps(vy0, vsign0, vx0, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x32()
91 vy1 = _mm512_mask_mul_ps(vy1, vsign1, vx1, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x32()
121 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x32()
155 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x32()
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| D | velu-avx512f-rr1-lut16-p3-perm-x16.c | 65 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16()
98 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16()
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| D | velu-avx512f-rr1-p6-x16.c | 66 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x16()
100 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x16()
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| /external/XNNPACK/src/f32-vlrelu/ |
| D | avx512f.c.in | 40 …vacc${ABC[N:N+16]} = _mm512_mask_mul_ps(vacc${ABC[N:N+16]}, vsign${ABC[N:N+16]}, vacc${ABC[N:N+16]…
52 vacc = _mm512_mask_mul_ps(vacc, vsign, vacc, vslope);
65 vacc = _mm512_mask_mul_ps(vacc, vsign, vacc, vslope);
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| /external/XNNPACK/src/f32-prelu/ |
| D | avx512f.c.in | 70 …const __m512 vacc${M}x${ABC[C:C+16]} = _mm512_mask_mul_ps(vi${M}x${ABC[C:C+16]}, vsign${M}x${ABC[C…
89 const __m512 vacc${M} = _mm512_mask_mul_ps(vi${M}, vsign${M}, vi${M}, vw);
109 const __m512 vacc${M} = _mm512_mask_mul_ps(vi${M}, vsign${M}, vi${M}, vw);
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| /external/XNNPACK/src/f32-velu/ |
| D | avx512f-rr1-lut16-p3-perm.c.in | 84 vy${N} = _mm512_mask_mul_ps(vy${N}, vsign${N}, vx${N}, vbeta);
114 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta);
147 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta);
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| D | avx512f-rr1-p6.c.in | 89 vy${N} = _mm512_mask_mul_ps(vy${N}, vsign${N}, vx${N}, vbeta);
120 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta);
154 vy = _mm512_mask_mul_ps(vy, vsign, vx, vbeta);
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| /external/XNNPACK/src/math/ |
| D | exp-avx512f-rr2-lut32-p2-perm2.c | 104 vf = _mm512_mask_mul_ps(vplus_inf, vinvof, vso, vf); in xnn_math_f32_exp__avx512f_rr2_lut32_p2_perm2()
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