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Searched refs:_reg_PHY_ADR_CALVL_SWIZZLE0_0 (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/drivers/renesas/rcar/ddr/ddr_b/
Dddr_regdef.h271 #define _reg_PHY_ADR_CALVL_SWIZZLE0_0 0x00000107U macro
Dboot_init_dram.c1632 ddr_setval(ch, _reg_PHY_ADR_CALVL_SWIZZLE0_0, data_l); in ddr_config_sub()
1668 _reg_PHY_ADR_CALVL_SWIZZLE0_0, in ddr_config_sub()
1806 ddr_setval(ch, _reg_PHY_ADR_CALVL_SWIZZLE0_0, ca_swizzle); in ddr_config_sub_h3v1x()
/external/arm-trusted-firmware/drivers/renesas/rzg/ddr/ddr_b/
Dddr_regdef.h273 #define _reg_PHY_ADR_CALVL_SWIZZLE0_0 0x00000107U macro
Dboot_init_dram.c1374 ddr_setval(ch, _reg_PHY_ADR_CALVL_SWIZZLE0_0, data_l); in ddr_config_sub()
1405 _reg_PHY_ADR_CALVL_SWIZZLE0_0, in ddr_config_sub()