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Searched refs:aarch64_neon_sshl (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicsAArch64.h155 aarch64_neon_sshl, // llvm.aarch64.neon.sshl enumerator
/external/clang/lib/CodeGen/
DCGBuiltin.cpp2995 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts),
2998 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts),
3186 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp8362 unsigned Opc = (Op.getOpcode() == ISD::SRA) ? Intrinsic::aarch64_neon_sshl in LowerVectorSRA_SRL_SHL()
10795 case Intrinsic::aarch64_neon_sshl: in tryCombineShiftImm()
11037 case Intrinsic::aarch64_neon_sshl: in performIntrinsicCombine()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp10010 unsigned Opc = (Op.getOpcode() == ISD::SRA) ? Intrinsic::aarch64_neon_sshl in LowerVectorSRA_SRL_SHL()
12951 case Intrinsic::aarch64_neon_sshl: in tryCombineShiftImm()
13266 case Intrinsic::aarch64_neon_sshl: in performIntrinsicCombine()
/external/llvm-project/clang/lib/CodeGen/
DCGBuiltin.cpp5670 NEONMAP2(vshl_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts),
5673 NEONMAP2(vshlq_v, aarch64_neon_ushl, aarch64_neon_sshl, Add1ArgType | UnsignedAlts),
5875 NEONMAP1(vshld_s64, aarch64_neon_sshl, Add1ArgType),
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenGlobalISel.inc32563 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32582 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32601 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32620 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32639 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32658 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
32677 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
34615 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
36179 GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp6658 unsigned Opc = (Op.getOpcode() == ISD::SRA) ? Intrinsic::aarch64_neon_sshl in LowerVectorSRA_SRL_SHL()
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen278 aarch64_neon_sshl, // llvm.aarch64.neon.sshl
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen286 aarch64_neon_sshl, // llvm.aarch64.neon.sshl
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen286 aarch64_neon_sshl, // llvm.aarch64.neon.sshl
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen286 aarch64_neon_sshl, // llvm.aarch64.neon.sshl
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen286 aarch64_neon_sshl, // llvm.aarch64.neon.sshl