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Searched refs:acc5 (Results 1 – 18 of 18) sorted by relevance

/external/rust/crates/ring/crypto/fipsmodule/ec/asm/
Dp256-x86_64-asm.pl197 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("%r$_",(8..15));
259 mov $acc0, $acc5
272 add %rax, $acc5 # guaranteed to be zero
297 adc \$0, $acc5
332 adc %rdx, $acc5
361 adc $t1, $acc5
392 add $t1, $acc5
395 add %rax, $acc5
421 sub %rax, $acc5
425 add $acc2, $acc5
[all …]
Decp_nistz256-armv8.pl92 $acc0,$acc1,$acc2,$acc3,$acc4,$acc5) =
222 mov $acc5,xzr
260 adc $acc4,$acc5,xzr
282 adc $acc5,xzr,xzr
293 adc $acc4,$acc5,xzr
345 mul $acc5,$a3,$a2 // a[3]*a[2]
356 adcs $acc5,$acc5,$t2
368 adcs $acc5,$acc5,$acc5
376 adcs $acc5,$acc5,$a2
404 adcs $acc1,$acc1,$acc5
/external/boringssl/src/crypto/fipsmodule/ec/asm/
Dp256-x86_64-asm.pl151 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("%r$_",(8..15));
213 mov $acc0, $acc5
226 add %rax, $acc5 # guaranteed to be zero
251 adc \$0, $acc5
286 adc %rdx, $acc5
315 adc $t1, $acc5
346 add $t1, $acc5
349 add %rax, $acc5
375 sub %rax, $acc5
379 add $acc2, $acc5
[all …]
/external/boringssl/src/crypto/fipsmodule/bn/asm/
Darmv8-mont.pl283 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("x$_",(19..26));
338 mov $acc5,xzr
388 adcs $acc5,$acc5,$t0
402 adcs $acc5,$acc5,$t2
415 adcs $acc5,$acc5,$t0
427 adcs $acc5,$acc5,$t1
438 adds $acc5,$acc5,$t2
448 stp $acc4,$acc5,[$tp],#8*2 // t[4..5]
498 adc $acc5,xzr,xzr // t[13]
501 adc $acc5,$acc5,$t1
[all …]
/external/rust/crates/ring/crypto/fipsmodule/bn/asm/
Darmv8-mont.pl283 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("x$_",(19..26));
338 mov $acc5,xzr
388 adcs $acc5,$acc5,$t0
402 adcs $acc5,$acc5,$t2
415 adcs $acc5,$acc5,$t0
427 adcs $acc5,$acc5,$t1
438 adds $acc5,$acc5,$t2
448 stp $acc4,$acc5,[$tp],#8*2 // t[4..5]
498 adc $acc5,xzr,xzr // t[13]
501 adc $acc5,$acc5,$t1
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dframe-20.ll85 %acc5 = fsub double %l5, %acc4
86 %acc6 = fsub double %l6, %acc5
117 store volatile double %acc5, double *%ptr
214 %acc5 = fsub double %l5, %acc4
215 %acc6 = fsub double %l6, %acc5
245 store volatile double %acc5, double *%ptr
316 %acc5 = fsub double %l5, %acc4
317 %acc6 = fsub double %l6, %acc5
341 store volatile double %acc5, double *%ptr
401 %acc5 = fsub double %l5, %acc4
[all …]
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dframe-20.ll85 %acc5 = fsub double %l5, %acc4
86 %acc6 = fsub double %l6, %acc5
117 store volatile double %acc5, double *%ptr
214 %acc5 = fsub double %l5, %acc4
215 %acc6 = fsub double %l6, %acc5
245 store volatile double %acc5, double *%ptr
316 %acc5 = fsub double %l5, %acc4
317 %acc6 = fsub double %l6, %acc5
341 store volatile double %acc5, double *%ptr
401 %acc5 = fsub double %l5, %acc4
[all …]
/external/XNNPACK/scripts/
Dgenerate-f32-raddstoreexpminusmax.sh19 … ELEMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
32 …NTS_TILE=20 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
45 …EMENTS_TILE=20 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
58 …_TILE=20 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
72 …5.c.in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -o src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c
82 …5.c.in -D ELEMENTS_TILE=80 -D ACCUMULATORS=5 -o src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c
96 …EMENTS_TILE=160 -D ACCUMULATORS=5 -o src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
114 …in -D ELEMENTS_TILE=20 -D ACCUMULATORS=5 -o src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c
Dgenerate-f32-raddextexp.sh15 …exp/avx2-p5.c.in -D ELEMENTS_TILE=80 -D ACCUMULATORS=5 -o src/f32-raddextexp/gen/avx2-p5-x80-acc5.c
29 …c.in -D ELEMENTS_TILE=160 -D ACCUMULATORS=5 -o src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c
Dgenerate-f32-raddexpminusmax.sh15 …vx2-p5.c.in -D ELEMENTS_TILE=80 -D ACCUMULATORS=5 -o src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c
29 …-D ELEMENTS_TILE=160 -D ACCUMULATORS=5 -o src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c
Dgenerate-f32-dwconv2d-chw.sh61 …n -D ROW_TILE=1 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
76 …D ROW_TILE=1 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
89 …-D ROW_TILE=1 -D ACCUMULATORS=5 -D FMA=0 -o src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
101 …ROW_TILE=1 -D ACCUMULATORS=5 -D FMA=1 -o src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
150 …p2-sse.c.in -D ROW_TILE=1 -D ACCUMULATORS=5 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c
163 …-sse.c.in -D ROW_TILE=1 -D ACCUMULATORS=5 -o src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c
198 …lar.c.in -D ROW_TILE=1 -D ACCUMULATORS=5 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
210 …r.c.in -D ROW_TILE=1 -D ACCUMULATORS=5 -o src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
311 … ACCUMULATORS=5 -D X86=0 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c
326 … ACCUMULATORS=5 -D X86=1 -o src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dacle-intrinsics-v5.ll62 %acc5 = call i32 @llvm.arm.smlawb(i32 %a, i32 %b, i32 %acc4)
63 %acc6 = call i32 @llvm.arm.smlawt(i32 %a, i32 %b, i32 %acc5)
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td423 def ACC5 : ACC<5, "acc5", [VSRp10, VSRp11]>, DwarfRegNum<[0, 0]>;
438 def UACC5 : UACC<5, "acc5", [VSRp10, VSRp11]>, DwarfRegNum<[0, 0]>;
/external/XNNPACK/
DAndroid.bp166 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
176 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
574 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
587 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
675 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
687 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1015 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
1027 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1193 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
1206 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
[all …]
DBUILD.bazel182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
844 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
857 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
870 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
883 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
896 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
906 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
916 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
926 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
[all …]
DCMakeLists.txt308 src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c
318 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c
714 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c
727 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c
815 src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c
827 src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c
1154 src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c
1166 src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c
1345 src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c
1358 src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c
[all …]
/external/pdfium/testing/resources/
Dbug_555784.in48 … /acb9 /acba /acbb /acbc /acbd /acbe /acbf /acc0 /acc1 /acc2 /acc3 /acc4 /acc5 /acc6 /acc7 /acc8 /…
/external/tensorflow/tensorflow/core/grappler/optimizers/
Dconstant_folding_test.cc3435 Output acc5 = fun(s.WithOpName("acc5"), {x, c1, c2}); in TEST_F() local
3438 {acc0, acc1, acc2, acc3, acc4, acc5, acc6}); in TEST_F()