/external/capstone/arch/X86/ |
D | X86Mapping.h | 36 bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, e… 37 bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enu…
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D | X86Mapping.c | 2695 enum cs_ac_type access1, access2; member 3023 bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, e… in X86_insn_reg_intel2() argument 3031 if (access1) in X86_insn_reg_intel2() 3032 *access1 = insn_regs_intel2[i].access1; in X86_insn_reg_intel2() 3044 bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enu… in X86_insn_reg_att2() argument 3053 if (access1) in X86_insn_reg_att2() 3054 *access1 = insn_regs_intel2[i].access2; in X86_insn_reg_att2() 3056 *access2 = insn_regs_intel2[i].access1; in X86_insn_reg_att2()
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D | X86ATTInstPrinter.c | 927 enum cs_ac_type access1, access2; in X86_ATT_printInst() local 1065 reg = X86_insn_reg_att(MCInst_getOpcode(MI), &access1); in X86_ATT_printInst() 1073 MI->flat_insn->detail->x86.operands[0].access = access1; in X86_ATT_printInst() 1077 if (X86_insn_reg_att2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { in X86_ATT_printInst() 1082 MI->flat_insn->detail->x86.operands[0].access = access1; in X86_ATT_printInst()
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D | X86IntelInstPrinter.c | 775 enum cs_ac_type access1, access2; in X86_Intel_printInst() local 792 reg = X86_insn_reg_intel(MCInst_getOpcode(MI), &access1); in X86_Intel_printInst() 807 MI->flat_insn->detail->x86.operands[0].access = access1; in X86_Intel_printInst() 810 if (X86_insn_reg_intel2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { in X86_Intel_printInst() 814 MI->flat_insn->detail->x86.operands[0].access = access1; in X86_Intel_printInst()
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/external/llvm-project/compiler-rt/test/tsan/ |
D | unaligned_race.cpp | 77 access1(bool main, int off, int sz1, int off2, bool rw, char *obj) { in access1() function 104 access1(main, off, sz1, off2, rw, (char*)obj); in Test()
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/external/compiler-rt/test/tsan/ |
D | unaligned_race.cc | 86 access1(bool main, int off, int sz1, int off2, bool rw, char *obj) { in access1() function 113 access1(main, off, sz1, off2, rw, (char*)obj); in Test()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZProcessors.td | 58 "interlocked-access1", "InterlockedAccess1",
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/external/llvm/test/MC/SystemZ/ |
D | insn-bad.s | 1594 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1598 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1602 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1606 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1610 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1614 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1618 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1622 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1626 #CHECK: error: {{(instruction requires: interlocked-access1)?}} 1630 #CHECK: error: {{(instruction requires: interlocked-access1)?}}
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZFeatures.td | 55 "interlocked-access1", "InterlockedAccess1",
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/external/llvm-project/llvm/lib/Target/SystemZ/ |
D | SystemZFeatures.td | 62 "interlocked-access1", "InterlockedAccess1", (all_of FeatureInterlockedAccess1),
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/external/llvm-project/llvm/test/MC/SystemZ/ |
D | insn-bad.s | 3092 #CHECK: error: instruction requires: interlocked-access1 3096 #CHECK: error: instruction requires: interlocked-access1 3100 #CHECK: error: instruction requires: interlocked-access1 3104 #CHECK: error: instruction requires: interlocked-access1 3143 #CHECK: error: instruction requires: interlocked-access1 3147 #CHECK: error: instruction requires: interlocked-access1 3151 #CHECK: error: instruction requires: interlocked-access1 3155 #CHECK: error: instruction requires: interlocked-access1 3193 #CHECK: error: instruction requires: interlocked-access1 3197 #CHECK: error: instruction requires: interlocked-access1 [all …]
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