| /external/llvm-project/compiler-rt/test/tsan/ |
| D | unaligned_race.cpp | 57 access2(bool main, int sz1, int off2, bool rw, volatile char *obj) { in access2() function
79 access2<0>(main, sz1, off2, rw, obj); in access1()
81 access2<1>(main, sz1, off2, rw, obj); in access1()
83 access2<2>(main, sz1, off2, rw, obj); in access1()
85 access2<3>(main, sz1, off2, rw, obj); in access1()
87 access2<4>(main, sz1, off2, rw, obj); in access1()
89 access2<5>(main, sz1, off2, rw, obj); in access1()
91 access2<6>(main, sz1, off2, rw, obj); in access1()
93 access2<7>(main, sz1, off2, rw, obj); in access1()
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| /external/compiler-rt/test/tsan/ |
| D | unaligned_race.cc | 66 access2(bool main, int sz1, int off2, bool rw, volatile char *obj) { in access2() function
88 access2<0>(main, sz1, off2, rw, obj); in access1()
90 access2<1>(main, sz1, off2, rw, obj); in access1()
92 access2<2>(main, sz1, off2, rw, obj); in access1()
94 access2<3>(main, sz1, off2, rw, obj); in access1()
96 access2<4>(main, sz1, off2, rw, obj); in access1()
98 access2<5>(main, sz1, off2, rw, obj); in access1()
100 access2<6>(main, sz1, off2, rw, obj); in access1()
102 access2<7>(main, sz1, off2, rw, obj); in access1()
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| /external/capstone/arch/X86/ |
| D | X86Mapping.h | 36 …unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
37 …unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2);
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| D | X86Mapping.c | 2695 enum cs_ac_type access1, access2; member
3023 …(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2) in X86_insn_reg_intel2() argument
3033 if (access2) in X86_insn_reg_intel2()
3034 *access2 = insn_regs_intel2[i].access2; in X86_insn_reg_intel2()
3044 …(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2) in X86_insn_reg_att2() argument
3054 *access1 = insn_regs_intel2[i].access2; in X86_insn_reg_att2()
3055 if (access2) in X86_insn_reg_att2()
3056 *access2 = insn_regs_intel2[i].access1; in X86_insn_reg_att2()
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| D | X86ATTInstPrinter.c | 927 enum cs_ac_type access1, access2; in X86_ATT_printInst() local
1077 if (X86_insn_reg_att2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { in X86_ATT_printInst()
1086 MI->flat_insn->detail->x86.operands[0].access = access2; in X86_ATT_printInst()
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| D | X86IntelInstPrinter.c | 775 enum cs_ac_type access1, access2; in X86_Intel_printInst() local
810 if (X86_insn_reg_intel2(MCInst_getOpcode(MI), ®, &access1, ®2, &access2)) { in X86_Intel_printInst()
818 MI->flat_insn->detail->x86.operands[1].access = access2; in X86_Intel_printInst()
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