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Searched refs:access_info (Results 1 – 4 of 4) sorted by relevance

/external/tensorflow/tensorflow/compiler/mlir/tensorflow/analysis/
Dside_effect_analysis.cc281 const auto& access_info = it->getSecond(); in AddPredecessorsForAccess() local
285 control_predecessors.insert(access_info.reads_since_last_write.begin(), in AddPredecessorsForAccess()
286 access_info.reads_since_last_write.end()); in AddPredecessorsForAccess()
287 read_tracked = !access_info.reads_since_last_write.empty(); in AddPredecessorsForAccess()
289 if (access_info.last_write && !read_tracked) { in AddPredecessorsForAccess()
290 control_predecessors.insert(access_info.last_write); in AddPredecessorsForAccess()
/external/llvm-project/compiler-rt/lib/hwasan/
Dhwasan_linux.cpp437 void __hwasan_tag_mismatch4(uptr addr, uptr access_info, uptr *registers_frame, in __hwasan_tag_mismatch4() argument
440 ai.is_store = access_info & 0x10; in __hwasan_tag_mismatch4()
442 ai.recover = access_info & 0x20; in __hwasan_tag_mismatch4()
444 if ((access_info & 0xf) == 0xf) in __hwasan_tag_mismatch4()
447 ai.size = 1 << (access_info & 0xf); in __hwasan_tag_mismatch4()
Dhwasan_interface_internal.h115 void __hwasan_tag_mismatch4(uptr addr, uptr access_info, uptr *registers_frame,
/external/llvm-project/polly/lib/External/isl/
Disl_flow.c319 isl_access_info *access_info; member
342 isl_access_info *acc = sort_info->access_info; in access_sort_cmp()
380 sort_info.access_info = acc; in isl_access_info_sort_sources()