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Searched refs:addr_high (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_secondary.c31 uint32_t addr_low, addr_high; in plat_secondary_setup() local
54 addr_high = (uint32_t)((params_from_bl2->tzdram_base >> 32U) & 0x7ffU); in plat_secondary_setup()
59 mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_HIGH, addr_high); in plat_secondary_setup()
60 assert(mmio_read_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_HIGH) == addr_high); in plat_secondary_setup()
67 addr_high); in plat_secondary_setup()
68 assert(mmio_read_32(TEGRA_SCRATCH_BASE + SCRATCH_RESET_VECTOR_HI) == addr_high); in plat_secondary_setup()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_secondary.c28 uint32_t addr_low, addr_high; in plat_secondary_setup() local
34 addr_high = (uintptr_t)(((uintptr_t)&tegra_secure_entrypoint >> 32U) & 0x7ffU); in plat_secondary_setup()
40 addr_high); in plat_secondary_setup()
/external/arm-trusted-firmware/drivers/arm/tzc/
Dtzc380.c70 static uint32_t addr_high(uintptr_t addr __unused) in addr_high() function
90 tzc380_write_region_base_high(tzc380.base, region, addr_high(region_base)); in tzc380_configure_region()
/external/ethtool/
Dfec_8xx.c14 uint32_t addr_high; /* upper 16 bits of station address||0 */ member
59 DUMP_REG(f, addr_high); in fec_8xx_dump_regs()