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Searched refs:amt1 (Results 1 – 25 of 64) sorted by relevance

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/external/libyuv/files/util/
Dcompare.cc38 int amt1 = 0; in main() local
41 amt1 = static_cast<int>(fread(buf1, 1, kBlockSize, fin1)); in main()
42 if (amt1 > 0) { in main()
43 hash1 = libyuv::HashDjb2(buf1, amt1, hash1); in main()
50 int amt_min = (amt1 < amt2) ? amt1 : amt2; in main()
54 } while (amt1 > 0 || amt2 > 0); in main()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEInstrInfo.td276 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
277 "# ADJCALLSTACKUP $amt1",
278 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/test/CodeGen/X86/
Dvector-shift-by-select-loop.ll14 …(i32* nocapture %arr, i8* nocapture readonly %control, i32 %count, i32 %amt0, i32 %amt1) nounwind {
455 %broadcast.splatinsert22 = insertelement <8 x i32> undef, i32 %amt1, i32 0
459 %broadcast.splatinsert26 = insertelement <8 x i32> undef, i32 %amt1, i32 0
463 %broadcast.splatinsert30 = insertelement <8 x i32> undef, i32 %amt1, i32 0
467 %broadcast.splatinsert34 = insertelement <8 x i32> undef, i32 %amt1, i32 0
533 %cond = select i1 %tobool, i32 %amt0, i32 %amt1
543 …capture %arr, i8* nocapture readonly %control, i32 %count, i32 %amt0, i32 %amt1, i32 %x) nounwind {
672 %splatinsert20 = insertelement <4 x i32> undef, i32 %amt1, i32 0
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td549 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
550 "#ADJCALLSTACKDOWN $amt1 $amt2",
551 [(BPFcallseq_start timm:$amt1, timm:$amt2)]>;
552 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
553 "#ADJCALLSTACKUP $amt1 $amt2",
554 [(BPFcallseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td753 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
754 "#ADJCALLSTACKDOWN $amt1 $amt2",
755 [(CallSeqStart timm:$amt1, timm:$amt2)]>;
756 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
757 "#ADJCALLSTACKUP $amt1 $amt2",
758 [(CallSeqEnd timm:$amt1, timm:$amt2)]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td753 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
754 "#ADJCALLSTACKDOWN $amt1 $amt2",
755 [(CallSeqStart timm:$amt1, timm:$amt2)]>;
756 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
757 "#ADJCALLSTACKUP $amt1 $amt2",
758 [(CallSeqEnd timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/lib/Target/BPF/
DBPFInstrInfo.td549 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
550 "#ADJCALLSTACKDOWN $amt1 $amt2",
551 [(BPFcallseq_start timm:$amt1, timm:$amt2)]>;
552 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
553 "#ADJCALLSTACKUP $amt1 $amt2",
554 [(BPFcallseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm/lib/Target/BPF/
DBPFInstrInfo.td443 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
444 "#ADJCALLSTACKUP $amt1 $amt2",
445 [(BPFcallseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td174 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
175 "#ADJCALLSTACKDOWN $amt1 $amt2",
176 [(MSP430callseq_start timm:$amt1, timm:$amt2)]>;
177 def ADJCALLSTACKUP : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
178 "#ADJCALLSTACKUP $amt1 $amt2",
179 [(MSP430callseq_end timm:$amt1, timm:$amt2)]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td174 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
175 "#ADJCALLSTACKDOWN $amt1 $amt2",
176 [(MSP430callseq_start timm:$amt1, timm:$amt2)]>;
177 def ADJCALLSTACKUP : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
178 "#ADJCALLSTACKUP $amt1 $amt2",
179 [(MSP430callseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm/lib/Target/X86/
DX86InstrCompiler.td46 def ADJCALLSTACKDOWN32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
50 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
52 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
55 def : Pat<(X86callseq_start timm:$amt1),
56 (ADJCALLSTACKDOWN32 i32imm:$amt1, 0)>, Requires<[NotLP64]>;
65 def ADJCALLSTACKDOWN64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
69 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
71 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
74 def : Pat<(X86callseq_start timm:$amt1),
75 (ADJCALLSTACKDOWN64 i32imm:$amt1, 0)>, Requires<[IsLP64]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstructions.td458 (outs), (ins i32imm:$amt0, i32imm:$amt1),
459 [(callseq_start timm:$amt0, timm:$amt1)],
460 "; adjcallstackup $amt0 $amt1"> {
470 (outs), (ins i32imm:$amt1, i32imm:$amt2),
471 [(callseq_end timm:$amt1, timm:$amt2)],
472 "; adjcallstackdown $amt1"> {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrCompiler.td41 (ins i32imm:$amt1, i32imm:$amt2, i32imm:$amt3),
43 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
45 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
48 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
49 (ADJCALLSTACKDOWN32 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[NotLP64]>;
59 (ins i32imm:$amt1, i32imm:$amt2, i32imm:$amt3),
61 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
63 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
66 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
67 (ADJCALLSTACKDOWN64 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[IsLP64]>;
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrCompiler.td41 (ins i32imm:$amt1, i32imm:$amt2, i32imm:$amt3),
43 def ADJCALLSTACKUP32 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
45 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
48 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
49 (ADJCALLSTACKDOWN32 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[NotLP64]>;
59 (ins i32imm:$amt1, i32imm:$amt2, i32imm:$amt3),
61 def ADJCALLSTACKUP64 : I<0, Pseudo, (outs), (ins i32imm:$amt1, i32imm:$amt2),
63 [(X86callseq_end timm:$amt1, timm:$amt2)]>,
66 def : Pat<(X86callseq_start timm:$amt1, timm:$amt2),
67 (ADJCALLSTACKDOWN64 i32imm:$amt1, i32imm:$amt2, 0)>, Requires<[IsLP64]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonPseudo.td82 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
86 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonPseudo.td82 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
86 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
/external/llvm-project/llvm/lib/Target/ARC/
DARCInstrInfo.td91 def ADJCALLSTACKUP : PseudoInstARC<(outs), (ins i32imm:$amt1, i32imm:$amt2),
92 "# ADJCALLSTACKUP $amt1",
93 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td759 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
760 "#ADJCALLSTACKUP $amt1 $amt2",
761 [(CallSeqEnd timm:$amt1, timm:$amt2)]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCInstrInfo.td91 def ADJCALLSTACKUP : PseudoInstARC<(outs), (ins i32imm:$amt1, i32imm:$amt2),
92 "# ADJCALLSTACKUP $amt1",
93 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td1219 // 32-bit software rotate by immediate. $amt2 should equal 32 - $amt1.
1222 (ins Int32Regs:$src, i32imm:$amt1, i32imm:$amt2),
1226 "shl.b32 \t%lhs, $src, $amt1;\n\t"
1273 // 64-bit software rotate by immediate. $amt2 should equal 64 - $amt1.
1276 (ins Int64Regs:$src, i32imm:$amt1, i32imm:$amt2),
1280 "shl.b64 \t%lhs, $src, $amt1;\n\t"
3108 NVPTXInst<(outs), (ins i32imm:$amt1, i32imm:$amt2),
3109 "\\{ // callseq $amt1, $amt2\n"
3111 [(callseq_start timm:$amt1, timm:$amt2)]>;
3113 NVPTXInst<(outs), (ins i32imm:$amt1, i32imm:$amt2),
[all …]
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.td1219 // 32-bit software rotate by immediate. $amt2 should equal 32 - $amt1.
1222 (ins Int32Regs:$src, i32imm:$amt1, i32imm:$amt2),
1226 "shl.b32 \t%lhs, $src, $amt1;\n\t"
1273 // 64-bit software rotate by immediate. $amt2 should equal 64 - $amt1.
1276 (ins Int64Regs:$src, i32imm:$amt1, i32imm:$amt2),
1280 "shl.b64 \t%lhs, $src, $amt1;\n\t"
3108 NVPTXInst<(outs), (ins i32imm:$amt1, i32imm:$amt2),
3109 "\\{ // callseq $amt1, $amt2\n"
3111 [(callseq_start timm:$amt1, timm:$amt2)]>;
3113 NVPTXInst<(outs), (ins i32imm:$amt1, i32imm:$amt2),
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td1053 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
1054 [(callseq_start timm:$amt1, timm:$amt2)]>;
1055 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
1056 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcInstrInfo.td427 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
428 "!ADJCALLSTACKDOWN $amt1, $amt2",
429 [(callseq_start timm:$amt1, timm:$amt2)]>;
430 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
431 "!ADJCALLSTACKUP $amt1",
432 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.td427 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
428 "!ADJCALLSTACKDOWN $amt1, $amt2",
429 [(callseq_start timm:$amt1, timm:$amt2)]>;
430 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
431 "!ADJCALLSTACKUP $amt1",
432 [(callseq_end timm:$amt1, timm:$amt2)]>;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td1120 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
1121 [(callseq_start timm:$amt1, timm:$amt2)]>;
1122 def ADJCALLSTACKUP : Pseudo<(outs), (ins i32imm:$amt1, i32imm:$amt2),
1123 [(callseq_end timm:$amt1, timm:$amt2)]>;

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