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Searched refs:bfmlalt (Results 1 – 10 of 10) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dbfmlal.s11 bfmlalt z0.S, z1.H, z2.H label
21 bfmlalt z0.S, z1.H, z2.H[0] label
31 bfmlalt z0.S, z1.H, z2.H[7] label
36 bfmlalt z0.S, z1.H, z7.H[7] label
46 bfmlalt z14.S, z10.H, z21.H label
74 bfmlalt z0.S, z1.H, z2.H label
94 bfmlalt z0.S, z1.H, z2.H[0] label
114 bfmlalt z0.S, z1.H, z2.H[7] label
124 bfmlalt z0.S, z1.H, z7.H[7] label
144 bfmlalt z14.S, z10.H, z21.H label
Dbfmlal-diagnostics.s13 bfmlalt z0.S, z1.H, z7.H[8] label
18 bfmlalt z0.S, z1.H, z8.H[7] label
23 bfmlalt z0.S, z1.H, z7.2h[2] label
28 bfmlalt z0.S, z1.H, z2.s[2] label
33 bfmlalt z0.S, z1.s, z2.h[2] label
39 bfmlalt z0.s, z1.h, z2.h label
/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.6a-bf16.s76 bfmlalt V21.4S, V14.8h, V10.8H label
89 bfmlalt V21.4S, V10.8H, V14.H[1] label
90 bfmlalt V21.4S, V10.8H, V14.H[2] label
91 bfmlalt V21.4S, V10.8H, V14.H[7] label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-bfloat.ll133 ; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h
135 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt(<vscale x 4 x float> %a, <vscale x 8 x …
141 ; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[0]
143 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane(<vscale x 4 x float> %a, <vscale x…
149 ; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[1]
151 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane(<vscale x 4 x float> %a, <vscale x…
157 ; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[2]
159 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane(<vscale x 4 x float> %a, <vscale x…
165 ; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[3]
167 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane(<vscale x 4 x float> %a, <vscale x…
[all …]
Daarch64-bf16-dotprod-intrinsics.ll101 ; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.8h
104 …%vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 …
135 ; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.h[0]
139 …%vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 …
146 ; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.h[3]
150 …%vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 …
158 declare <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float>, <8 x bfloat>, <8 x bfloat>)
/external/llvm-project/llvm/test/Bitcode/
Daarch64-bf16-upgrade.ll60 …%vbfmlalt1.i = call <4 x float> @llvm.aarch64.neon.bfmlalt.v4f32.v16i8(<4 x float> %r, <16 x i8> %…
63 …; CHECK-NEXT: %vbfmlalt1.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bflo…
75 declare <4 x float> @llvm.aarch64.neon.bfmlalt.v4f32.v16i8(<4 x float>, <16 x i8>, <16 x i8>)
76 ; CHECK: declare <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float>, <8 x bfloat>, <8 x bfloat>)
Darm-bf16-upgrade.ll60 …%vbfmlalt1.i = call <4 x float> @llvm.arm.neon.bfmlalt.v4f32.v16i8(<4 x float> %r, <16 x i8> %0, <…
63 …; CHECK-NEXT: %vbfmlalt1.i = call <4 x float> @llvm.arm.neon.bfmlalt(<4 x float> %r, <8 x bfloat> …
75 declare <4 x float> @llvm.arm.neon.bfmlalt.v4f32.v16i8(<4 x float>, <16 x i8>, <16 x i8>)
76 ; CHECK: declare <4 x float> @llvm.arm.neon.bfmlalt(<4 x float>, <8 x bfloat>, <8 x bfloat>)
/external/llvm-project/llvm/test/CodeGen/ARM/
Darm-bf16-dotprod-intrinsics.ll104 …%vbfmlaltq_v3.i = call <4 x float> @llvm.arm.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bf…
139 …%vbfmlaltq_v3.i = call <4 x float> @llvm.arm.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bf…
150 …%vbfmlaltq_v3.i = call <4 x float> @llvm.arm.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bf…
162 …%vbfmlalt1.i = call <4 x float> @llvm.arm.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bfloa…
170 declare <4 x float> @llvm.arm.neon.bfmlalt(<4 x float>, <8 x bfloat>, <8 x bfloat>)
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1528 defm BFMMLA_T_ZZZ : sve_bfloat_matmul_longvecl<0b1, "bfmlalt", int_aarch64_sve_bfmlalt>;
1530 … defm BFMMLA_T_ZZI : sve_bfloat_matmul_longvecl_idx<0b1, "bfmlalt", int_aarch64_sve_bfmlalt_lane>;
DAArch64InstrInfo.td802 def BFMLALT : SIMDBF16MLAL<1, "bfmlalt", int_aarch64_neon_bfmlalt>;
804 def BFMLALTIdx : SIMDBF16MLALIndex<1, "bfmlalt", int_aarch64_neon_bfmlalt>;