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Searched refs:bfmmla (Results 1 – 11 of 11) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dbfmmla-diagnostics.s3 bfmmla z0.s, z1.s, z2.h label
8 bfmmla z0.h, z1.h, z2.h label
13 bfmmla z0.s, z1.h, z2.s label
19 bfmmla z0.s, z1.h, z2.h label
Dbfmmla.s6 bfmmla z0.S, z1.H, z2.H label
19 bfmmla z0.S, z1.H, z2.H label
/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.6a-bf16.s52 bfmmla v2.4s, v3.8h, v4.8h label
53 bfmmla v3.4s, v4.8h, v5.8h label
/external/llvm-project/llvm/test/Bitcode/
Daarch64-bf16-upgrade.ll34 …%vbfmmla1.i = call <4 x float> @llvm.aarch64.neon.bfmmla.v4f32.v16i8(<4 x float> %r, <16 x i8> %0,…
37 …; CHECK-NEXT: %vbfmmla1.i = call <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float> %r, <8 x bfloat…
71 declare <4 x float> @llvm.aarch64.neon.bfmmla.v4f32.v16i8(<4 x float>, <16 x i8>, <16 x i8>)
72 ; CHECK: declare <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float>, <8 x bfloat>, <8 x bfloat>)
Darm-bf16-upgrade.ll34 …%vbfmmla1.i = call <4 x float> @llvm.arm.neon.bfmmla.v4f32.v16i8(<4 x float> %r, <16 x i8> %0, <16…
37 …; CHECK-NEXT: %vbfmmla1.i = call <4 x float> @llvm.arm.neon.bfmmla(<4 x float> %r, <8 x bfloat> %2…
71 declare <4 x float> @llvm.arm.neon.bfmmla.v4f32.v16i8(<4 x float>, <16 x i8>, <16 x i8>)
72 ; CHECK: declare <4 x float> @llvm.arm.neon.bfmmla(<4 x float>, <8 x bfloat>, <8 x bfloat>)
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.6a-bf16.txt54 # CHECK: bfmmla v2.4s, v3.8h, v4.8h
55 # CHECK: bfmmla v3.4s, v4.8h, v5.8h
/external/llvm-project/llvm/test/CodeGen/AArch64/
Daarch64-bf16-dotprod-intrinsics.ll81 ; CHECK-NEXT: bfmmla v0.4s, v1.8h, v2.8h
84 …%vbfmmlaq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float> %r, <8 x bfloat> %a, <8 x …
156 declare <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float>, <8 x bfloat>, <8 x bfloat>)
Dsve-intrinsics-bfloat.ll209 ; CHECK-NEXT: bfmmla z0.s, z1.h, z2.h
211 …%out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmmla(<vscale x 4 x float> %a, <vscale x 8 x b…
245 declare <vscale x 4 x float> @llvm.aarch64.sve.bfmmla(<vscale x 4 x float>, <vscale x 8 x bfloat>, …
/external/llvm-project/llvm/test/CodeGen/ARM/
Darm-bf16-dotprod-intrinsics.ll84 …%vbfmmlaq_v3.i = call <4 x float> @llvm.arm.neon.bfmmla(<4 x float> %r, <8 x bfloat> %a, <8 x bflo…
168 declare <4 x float> @llvm.arm.neon.bfmmla(<4 x float>, <8 x bfloat>, <8 x bfloat>)
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1526 defm BFMMLA_ZZZ : sve_bfloat_matmul<"bfmmla", int_aarch64_sve_bfmmla>;
DAArch64InstrInfo.td800 def BFMMLA : SIMDThreeSameVectorBF16MatrixMul<"bfmmla">;