| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_gmem.c | 48 uint32_t bin_w, bool decode_srgb) in emit_mrt() argument
53 if (bin_w) { in emit_mrt()
97 if (bin_w) { in emit_mrt()
98 stride = bin_w << fdl_cpp_shift(&rsc->layout); in emit_mrt()
116 if (bin_w || (i >= nr_bufs) || !bufs[i]) { in emit_mrt()
298 struct pipe_surface **bufs, uint32_t nr_bufs, uint32_t bin_w) in emit_mem2gmem_surf() argument
303 emit_mrt(ring, nr_bufs, bufs, bases, bin_w, false); in emit_mem2gmem_surf()
338 unsigned bin_w = tile->bin_w; in fd4_emit_tile_mem2gmem() local
344 x1 = ((float)tile->xoff + bin_w) / ((float)pfb->width); in fd4_emit_tile_mem2gmem()
395 OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0((float)bin_w/2.0)); in fd4_emit_tile_mem2gmem()
[all …]
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_gmem.c | 46 struct pipe_surface **bufs, const uint32_t *bases, uint32_t bin_w, in emit_mrt() argument
62 if (bin_w) { in emit_mrt()
94 if (bin_w) { in emit_mrt()
95 stride = bin_w << fdl_cpp_shift(&rsc->layout); in emit_mrt()
114 if (bin_w || (i >= nr_bufs) || !bufs[i]) { in emit_mrt()
296 OUT_RING(ring, A3XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | in emit_binning_workaround()
415 A3XX_RB_RENDER_CONTROL_BIN_WIDTH(batch->gmem_state->bin_w)); in fd3_emit_tile_gmem2mem()
479 struct pipe_surface **psurf, uint32_t bufs, uint32_t bin_w) in emit_mem2gmem_surf() argument
491 emit_mrt(ring, bufs, psurf, bases, bin_w, false); in emit_mem2gmem_surf()
508 OUT_RING(ring, A3XX_RB_DEPTH_PITCH(4 * batch->gmem_state->bin_w)); in emit_mem2gmem_surf()
[all …]
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| /external/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_gmem.c | 136 gmem->bin_w, gmem->bin_h, gmem->nbins_x, gmem->nbins_y); in dump_gmem_state()
141 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h; in dump_gmem_state()
152 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h; in dump_gmem_state()
180 uint32_t bin_w, bin_h; in layout_gmem() local
181 bin_w = div_align(key->width, nbins_x, screen->info.tile_align_w); in layout_gmem()
184 if (bin_w > screen->info.tile_max_w) in layout_gmem()
190 gmem->bin_w = bin_w; in layout_gmem()
196 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w); in layout_gmem()
202 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h; in layout_gmem()
208 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h; in layout_gmem()
[all …]
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| D | freedreno_gmem.h | 44 uint16_t bin_w, bin_h; member
58 uint16_t bin_w, nbins_x; member
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| D | gmemtool.c | 179 assert((gmem->bin_w * gmem->nbins_x) >= key.width); in main()
181 assert(gmem->bin_w < screen.info.tile_max_w); in main()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_gmem.c | 192 OUT_RING(ring, fui((float) gmem->bin_w / 2.0)); /* XSCALE */ in prepare_tile_fini_ib()
193 OUT_RING(ring, fui((float) gmem->bin_w / 2.0)); /* XOFFSET */ in prepare_tile_fini_ib()
283 unsigned bin_w = tile->bin_w; in fd2_emit_tile_mem2gmem() local
294 x1 = ((float)tile->xoff + bin_w) / ((float)pfb->width); in fd2_emit_tile_mem2gmem()
350 OUT_RING(ring, xy2d(bin_w, bin_h)); /* PA_SC_WINDOW_SCISSOR_BR */ in fd2_emit_tile_mem2gmem()
354 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XSCALE */ in fd2_emit_tile_mem2gmem()
355 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XOFFSET */ in fd2_emit_tile_mem2gmem()
491 OUT_RING(ring, gmem->bin_w); /* RB_SURFACE_INFO */ in fd2_emit_tile_init()
517 size = align(gmem->bin_w * gmem->bin_h * color_size, 0x8000); in fd2_emit_tile_init()
522 size = align(gmem->bin_w * gmem->bin_h * depth_size, 0x8000); in fd2_emit_tile_init()
[all …]
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_gmem.c | 88 stride = gmem->bin_w * gmem->cbuf_cpp[i]; in emit_mrt()
144 stride = cpp * gmem->bin_w; in emit_zs()
190 stride = 1 * gmem->bin_w; in emit_zs()
268 OUT_RING(ring, A5XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | in update_vsc_pipe()
315 OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | in emit_binning_pass()
419 uint32_t x2 = tile->xoff + tile->bin_w - 1; in fd5_emit_tile_prep()
499 stride = gmem->bin_w << fdl_cpp_shift(&rsc->layout); in emit_mem2gmem_surf()
536 OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | in fd5_emit_tile_mem2gmem()
572 OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | in fd5_emit_tile_renderprep()
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| /external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_gmem.c | 271 *patch->cs = patch->val | A6XX_TEX_CONST_2_PITCH(gmem->bin_w * gmem->cbuf_cpp[0]); in patch_fb_read()
363 A6XX_VSC_BIN_SIZE(.width = gmem->bin_w, .height = gmem->bin_h), in update_vsc_pipe()
715 set_bin_size(ring, gmem->bin_w, gmem->bin_h, in fd6_emit_tile_init()
732 set_bin_size(ring, gmem->bin_w, gmem->bin_h, in fd6_emit_tile_init()
750 set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000); in fd6_emit_tile_init()
792 uint32_t x2 = tile->xoff + tile->bin_w - 1; in fd6_emit_tile_prep()
821 set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000); in fd6_emit_tile_prep()
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| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_cmd_buffer.c | 301 uint32_t bin_w, uint32_t bin_h, uint32_t flags) in tu6_emit_bin_size() argument
304 A6XX_GRAS_BIN_CONTROL(.binw = bin_w, in tu6_emit_bin_size()
309 A6XX_RB_BIN_CONTROL(.binw = bin_w, in tu6_emit_bin_size()
315 A6XX_RB_BIN_CONTROL2(.binw = bin_w, in tu6_emit_bin_size()
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