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Searched refs:brw_bo_map (Results 1 – 16 of 16) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_buffer_objects.c261 void *map = brw_bo_map(brw, intel_obj->buffer, MAP_WRITE | MAP_ASYNC); in brw_buffer_subdata()
359 void *map = brw_bo_map(brw, intel_obj->buffer, map_flags); in brw_get_buffer_subdata()
469 void *map = brw_bo_map(brw, intel_obj->range_map_bo[index], access); in brw_map_buffer_range()
474 void *map = brw_bo_map(brw, intel_obj->buffer, access); in brw_map_buffer_range()
Dintel_upload.c90 upload->map = brw_bo_map(NULL, upload->bo, in brw_upload_space()
Dbrw_bufmgr.h290 MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
Dintel_batchbuffer.c98 .map = brw_bo_map(brw, bo, MAP_READ) + (address - bo_address), in decode_get_bo()
246 grow->map = brw_bo_map(brw, grow->bo, MAP_READ | MAP_WRITE); in recreate_growing_buffer()
436 grow->map = brw_bo_map(brw, new_bo, MAP_READ | MAP_WRITE); in grow_buffer()
764 void *bo_map = brw_bo_map(brw, batch->batch.bo, MAP_WRITE); in submit_batch()
767 bo_map = brw_bo_map(brw, batch->state.bo, MAP_WRITE); in submit_batch()
Dbrw_pipe_control.c382 bo_map = brw_bo_map(NULL, brw->workaround_bo, MAP_READ | MAP_WRITE); in init_identifier_bo()
Dbrw_program_cache.c216 void *map = brw_bo_map(brw, new_bo, MAP_READ | MAP_WRITE | in brw_cache_new_bo()
384 cache->map = brw_bo_map(brw, cache->bo, MAP_READ | MAP_WRITE | in brw_init_caches()
Dintel_pixel_read.c161 void *map = brw_bo_map(brw, bo, MAP_READ | MAP_RAW); in intel_readpixels_tiled_memcpy()
Dgen6_queryobj.c231 uint64_t *results = brw_bo_map(brw, query->bo, MAP_READ); in gen6_queryobj_get_results()
Dbrw_queryobj.c152 results = brw_bo_map(brw, query->bo, MAP_READ); in brw_queryobj_get_results()
Dgen6_sol.c251 uint64_t *prim_counts = brw_bo_map(brw, bo, MAP_READ); in aggregate_transform_feedback_counter()
Dbrw_performance_query.c494 perf_cfg->vtbl.bo_map = (bo_map_t)brw_bo_map; in brw_init_perf_query_info()
Dintel_tex_image.c269 void *map = brw_bo_map(brw, bo, MAP_WRITE | MAP_RAW); in intel_texsubimage_tiled_memcpy()
822 void *map = brw_bo_map(brw, bo, MAP_READ | MAP_RAW); in intel_gettexsubimage_tiled_memcpy()
Dintel_screen.c861 raw_data = brw_bo_map(brw, bo, flags); in intel_map_image()
2052 map = brw_bo_map(NULL, bo, MAP_WRITE); in intel_detect_pipelined_register()
2108 void *results_map = brw_bo_map(NULL, results, MAP_READ); in intel_detect_pipelined_register()
Dbrw_bufmgr.c606 void *map = brw_bo_map(NULL, bo, MAP_WRITE | MAP_RAW); in bo_alloc_internal()
1258 brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags) in brw_bo_map() function
Dbrw_program.c740 void *bo_map = brw_bo_map(brw, brw->shader_time.bo, MAP_READ | MAP_WRITE); in brw_collect_shader_time()
Dintel_mipmap_tree.c1497 void *map = brw_bo_map(brw, buf->bo, MAP_WRITE | MAP_RAW); in intel_alloc_aux_buffer()
2415 return brw_bo_map(brw, bo, mode); in intel_miptree_map_raw()