Home
last modified time | relevance | path

Searched refs:clk_rate (Results 1 – 25 of 30) sorted by relevance

12

/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/mdss/mdp_commit/
Dformat11 field:u32 clk_rate; offset:16; size:4; signed:0;
14 …t fmt: "num=%d play_cnt=%d bandwidth=%llu clk_rate=%u", REC->num, REC->play_cnt, REC->bandwidth, R…
/external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/mdss/mdp_commit/
Dformat11 field:u32 clk_rate; offset:16; size:4; signed:0;
14 …t fmt: "num=%d play_cnt=%d bandwidth=%llu clk_rate=%u", REC->num, REC->play_cnt, REC->bandwidth, R…
/external/arm-trusted-firmware/drivers/st/mmc/
Dstm32_sdmmc2.c157 clock_div = div_round_up(sdmmc2_params.clk_rate, freq * 2U); in stm32_sdmmc2_init()
421 uint32_t clk_rate = sdmmc2_params.clk_rate; in stm32_sdmmc2_set_ios() local
458 clock_div = div_round_up(clk_rate, freq * 2U); in stm32_sdmmc2_set_ios()
755 sdmmc2_params.clk_rate = stm32mp_clk_get_rate(sdmmc2_params.clock_id); in stm32_sdmmc2_mmc_init()
758 return mmc_init(&stm32_sdmmc2_ops, sdmmc2_params.clk_rate, in stm32_sdmmc2_mmc_init()
/external/arm-trusted-firmware/include/drivers/synopsys/
Ddw_mmc.h16 int clk_rate; member
/external/arm-trusted-firmware/drivers/rpi3/sdhost/
Drpi3_sdhost.c239 rpi3_sdhost_params.clk_rate = 0; in rpi3_sdhost_reset()
416 rpi3_sdhost_params.clk_rate = max_clk / (div + 2); in rpi3_sdhost_set_clock()
418 rpi3_sdhost_params.clk_rate) in rpi3_sdhost_set_clock()
626 mmc_init(&rpi3_sdhost_ops, params->clk_rate, params->bus_width, in rpi3_sdhost_init()
/external/arm-trusted-firmware/include/drivers/st/
Dstm32_sdmmc2.h16 unsigned int clk_rate; member
/external/arm-trusted-firmware/drivers/synopsys/emmc/
Ddw_mmc.c165 if ((dw_params.clk_rate / (2 * div)) <= clk) { in dw_set_clk()
423 (params->clk_rate > 0) && in dw_mmc_init()
430 mmc_init(&dw_mmc_ops, params->clk_rate, params->bus_width, in dw_mmc_init()
/external/arm-trusted-firmware/plat/intel/soc/common/include/
Dsocfpga_private.h16 .clk_rate = (clk), \
/external/arm-trusted-firmware/plat/hisilicon/poplar/include/
Dhi3798cv200.h71 .clk_rate = 25 * 1000 * 1000, \
/external/arm-trusted-firmware/drivers/imx/usdhc/
Dimx_usdhc.c294 (params->clk_rate > 0) && in imx_usdhc_init()
300 mmc_init(&imx_usdhc_ops, params->clk_rate, params->bus_width, in imx_usdhc_init()
Dimx_usdhc.h14 int clk_rate; member
/external/perfetto/src/traced/probes/ftrace/test/data/synthetic/events/sde/sde_perf_calc_crtc/
Dformat18 print fmt: "crtc=%d mnoc=[%llu, %llu] llcc=[%llu %llu] ebi=[%llu, %llu] clk_rate=%u", REC->crtc, RE…
/external/arm-trusted-firmware/include/drivers/rpi3/sdhost/
Drpi3_sdhost.h17 uint32_t clk_rate; member
/external/arm-trusted-firmware/plat/rpi/rpi3/
Drpi3_bl2_setup.c37 params.clk_rate = 50000000; in rpi3_sdhost_setup()
/external/arm-trusted-firmware/plat/imx/imx7/warp7/
Dwarp7_bl2_el3_setup.c106 params.clk_rate = 25000000; in warp7_usdhc_setup()
/external/arm-trusted-firmware/plat/imx/imx7/picopi/
Dpicopi_bl2_el3_setup.c100 params.clk_rate = 25000000; in picopi_usdhc_setup()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl1_setup.c99 params.clk_rate = 24 * 1000 * 1000; in bl1_platform_setup()
Dhikey_bl2_setup.c322 params.clk_rate = 24 * 1000 * 1000; in bl2_platform_setup()
/external/arm-trusted-firmware/plat/xilinx/versal/pm_service/
Dpm_api_sys.h56 enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate);
Dpm_api_sys.c581 enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate) in pm_clock_get_rate() argument
588 return pm_ipi_send_sync(primary_proc, payload, clk_rate, 2); in pm_clock_get_rate()
/external/cpuinfo/test/dmesg/
Dmoto-g-gen4.log200 [ 0.850037,4] msm_cci_get_clk_info: clk_rate[0][0] = 61540000
202 [ 0.850052,4] msm_cci_get_clk_info: clk_rate[0][1] = 19200000
204 [ 0.850066,4] msm_cci_get_clk_info: clk_rate[0][2] = -1
206 [ 0.850080,4] msm_cci_get_clk_info: clk_rate[0][3] = -1
208 [ 0.850094,4] msm_cci_get_clk_info: clk_rate[0][4] = -1
210 [ 0.850108,4] msm_cci_get_clk_info: clk_rate[0][5] = -1
212 [ 0.850122,4] msm_cci_get_clk_info: clk_rate[1][0] = 61540000
214 [ 0.850136,4] msm_cci_get_clk_info: clk_rate[1][1] = 37500000
216 [ 0.850149,4] msm_cci_get_clk_info: clk_rate[1][2] = -1
218 [ 0.850163,4] msm_cci_get_clk_info: clk_rate[1][3] = -1
[all …]
Dxiaomi-redmi-note-3.log860 <3>[ 0.764786] msm_cci_get_clk_info: clk_rate[0][0] = -1
862 <3>[ 0.764798] msm_cci_get_clk_info: clk_rate[0][1] = 19200000
864 <3>[ 0.764811] msm_cci_get_clk_info: clk_rate[0][2] = -1
866 <3>[ 0.764822] msm_cci_get_clk_info: clk_rate[0][3] = -1
868 <3>[ 0.764834] msm_cci_get_clk_info: clk_rate[0][4] = -1
870 <3>[ 0.764847] msm_cci_get_clk_info: clk_rate[0][5] = 61540000
872 <3>[ 0.764858] msm_cci_get_clk_info: clk_rate[1][0] = -1
874 <3>[ 0.764870] msm_cci_get_clk_info: clk_rate[1][1] = 37500000
876 <3>[ 0.764882] msm_cci_get_clk_info: clk_rate[1][2] = -1
878 <3>[ 0.764893] msm_cci_get_clk_info: clk_rate[1][3] = -1
[all …]
Dnexus6p.log852 [ 1.850691] msm_cci_get_clk_info: clk_rate[0][0] = -1
854 [ 1.850702] msm_cci_get_clk_info: clk_rate[0][1] = 19200000
856 [ 1.850714] msm_cci_get_clk_info: clk_rate[0][2] = -1
858 [ 1.850725] msm_cci_get_clk_info: clk_rate[0][3] = -1
860 [ 1.850736] msm_cci_get_clk_info: clk_rate[0][4] = -1
862 [ 1.850747] msm_cci_get_clk_info: clk_rate[1][0] = -1
864 [ 1.850758] msm_cci_get_clk_info: clk_rate[1][1] = 37500000
866 [ 1.850769] msm_cci_get_clk_info: clk_rate[1][2] = -1
868 [ 1.850780] msm_cci_get_clk_info: clk_rate[1][3] = -1
870 [ 1.850791] msm_cci_get_clk_info: clk_rate[1][4] = -1
[all …]
Dnexus5x.log726 [ 1.337870] msm_cci_get_clk_info: clk_rate[0][0] = -1
728 [ 1.337883] msm_cci_get_clk_info: clk_rate[0][1] = 19200000
730 [ 1.337896] msm_cci_get_clk_info: clk_rate[0][2] = -1
732 [ 1.337910] msm_cci_get_clk_info: clk_rate[0][3] = -1
734 [ 1.337924] msm_cci_get_clk_info: clk_rate[0][4] = -1
746 …70] g_sctrl[1] ffffffc06c866000<6>[ 1.868687] MSM-CPP msm_cpp_get_clk_info:3457 clk_rate[0] = -1
747 [ 1.868695] MSM-CPP msm_cpp_get_clk_info:3457 clk_rate[1] = 465000000
748 [ 1.868700] MSM-CPP msm_cpp_get_clk_info:3457 clk_rate[2] = -1
749 [ 1.868706] MSM-CPP msm_cpp_get_clk_info:3457 clk_rate[3] = -1
750 [ 1.868712] MSM-CPP msm_cpp_get_clk_info:3457 clk_rate[4] = 465000000
[all …]
/external/perfetto/protos/perfetto/trace/ftrace/
Dmdss.proto15 optional uint32 clk_rate = 3; field

12