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Searched refs:clock64 (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/NVPTX/
Dintrinsics.ll110 ; reading clock() or clock64() should not be CSE'd as each read may return
125 ; CHECK: mov.u64 %r{{.*}}, %clock64;
126 %a = tail call i64 @llvm.nvvm.read.ptx.sreg.clock64()
127 ; CHECK: mov.u64 %r{{.*}}, %clock64;
128 %b = tail call i64 @llvm.nvvm.read.ptx.sreg.clock64()
146 declare i64 @llvm.nvvm.read.ptx.sreg.clock64()
Dintrinsic-old.ll237 ; CHECK: mov.u64 %rd{{[0-9]+}}, %clock64;
239 %x = call i64 @llvm.nvvm.read.ptx.sreg.clock64()
312 declare i64 @llvm.nvvm.read.ptx.sreg.clock64()
/external/llvm/test/CodeGen/NVPTX/
Dintrinsic-old.ll230 ; CHECK: mov.u64 %rd{{[0-9]+}}, %clock64;
232 %x = call i64 @llvm.nvvm.read.ptx.sreg.clock64()
305 declare i64 @llvm.nvvm.read.ptx.sreg.clock64()
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DTensorRandom.h23 return clock64() + in get_random_seed()
/external/llvm-project/clang/lib/Headers/
D__clang_cuda_device_functions.h1472 __DEVICE__ long long clock64() { return __nvvm_read_ptx_sreg_clock64(); } in clock64() function
/external/llvm/include/llvm/IR/
DIntrinsicsNVVM.td3682 def int_nvvm_read_ptx_sreg_clock64 : PTXReadSRegIntrinsic_r64<"clock64">;
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DIntrinsicsNVVM.td3995 def int_nvvm_read_ptx_sreg_clock64 : PTXReadNCSRegIntrinsic_r64<"clock64">;
/external/llvm-project/llvm/include/llvm/IR/
DIntrinsicsNVVM.td3988 def int_nvvm_read_ptx_sreg_clock64 : PTXReadNCSRegIntrinsic_r64<"clock64">;
/external/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td7053 PTX_READ_SREG_R64<"clock64", int_nvvm_read_ptx_sreg_clock64>;
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td7333 PTX_READ_SREG_R64<"clock64", int_nvvm_read_ptx_sreg_clock64>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td7333 PTX_READ_SREG_R64<"clock64", int_nvvm_read_ptx_sreg_clock64>;
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3113 nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64
9171 "llvm.nvvm.read.ptx.sreg.clock64",
17111 1, // llvm.nvvm.read.ptx.sreg.clock64
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3113 nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64
9171 "llvm.nvvm.read.ptx.sreg.clock64",
17111 1, // llvm.nvvm.read.ptx.sreg.clock64
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3113 nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64
9171 "llvm.nvvm.read.ptx.sreg.clock64",
17111 1, // llvm.nvvm.read.ptx.sreg.clock64
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3107 nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64
9131 "llvm.nvvm.read.ptx.sreg.clock64",
17016 1, // llvm.nvvm.read.ptx.sreg.clock64
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3113 nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64
9171 "llvm.nvvm.read.ptx.sreg.clock64",
17111 1, // llvm.nvvm.read.ptx.sreg.clock64
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc4598 "llvm.nvvm.read.ptx.sreg.clock64",
14731 158, // llvm.nvvm.read.ptx.sreg.clock64