Home
last modified time | relevance | path

Searched refs:dispatch_mode (Results 1 – 16 of 16) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_vec4_gs_visitor.cpp133 prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2; in setup_payload()
822 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_gs()
853 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in brw_compile_gs()
917 prog_data->base.dispatch_mode = DISPATCH_MODE_4X1_SINGLE; in brw_compile_gs()
919 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_INSTANCE; in brw_compile_gs()
Dtest_vec4_dead_code_eliminate.cpp51 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in dead_code_eliminate_vec4_visitor()
Dtest_vec4_copy_propagation.cpp53 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in copy_propagation_vec4_visitor()
Dbrw_vec4_tcs.cpp406 vue_prog_data->dispatch_mode = DISPATCH_MODE_TCS_8_PATCH; in brw_compile_tcs()
411 vue_prog_data->dispatch_mode = DISPATCH_MODE_TCS_SINGLE_PATCH; in brw_compile_tcs()
Dbrw_vec4.cpp2149 enum shader_dispatch_mode dispatch_mode) in stage_uses_interleaved_attributes() argument
2155 return dispatch_mode != DISPATCH_MODE_4X2_DUAL_OBJECT; in stage_uses_interleaved_attributes()
2169 enum shader_dispatch_mode dispatch_mode, in get_lowered_simd_width() argument
2211 stage_uses_interleaved_attributes(stage, dispatch_mode)) in get_lowered_simd_width()
2265 get_lowered_simd_width(devinfo, prog_data->dispatch_mode, stage, inst); in lower_simd_width()
2323 prog_data->dispatch_mode); in lower_simd_width()
2421 (stage_uses_interleaved_attributes(stage, prog_data->dispatch_mode) && in is_supported_64bit_region()
2940 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_vs()
2973 prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in brw_compile_vs()
Dtest_vec4_register_coalesce.cpp56 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in register_coalesce_vec4_visitor()
Dbrw_vec4_copy_propagation.cpp457 prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT ? 1 : 2; in opt_copy_propagation()
Dbrw_compiler.h1206 enum shader_dispatch_mode dispatch_mode; member
Dbrw_shader.cpp1372 prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; in brw_compile_tes()
Dtest_vec4_cmod_propagation.cpp55 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; in cmod_propagation_vec4_visitor()
Dbrw_fs.cpp8132 if (vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_8_PATCH) { in set_tcs_invocation_id()
8138 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_SINGLE_PATCH); in set_tcs_invocation_id()
8163 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_SINGLE_PATCH || in run_tcs()
8164 vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_8_PATCH); in run_tcs()
8166 if (vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_SINGLE_PATCH) { in run_tcs()
8170 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_8_PATCH); in run_tcs()
8186 vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_SINGLE_PATCH && in run_tcs()
Dbrw_fs_nir.cpp2720 if (vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_SINGLE_PATCH) { in get_tcs_output_urb_handle()
2723 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_8_PATCH); in get_tcs_output_urb_handle()
2738 vue_prog_data->dispatch_mode == DISPATCH_MODE_TCS_8_PATCH; in nir_emit_tcs_intrinsic()
/external/mesa3d/src/intel/vulkan/
DgenX_pipeline.c1607 vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8;
1731 hs.DispatchMode = tcs_prog_data->base.dispatch_mode;
1785 tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8 ?
1789 assert(tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8);
1823 gs.DispatchMode = gs_prog_data->base.dispatch_mode;
/external/mesa3d/src/mesa/drivers/dri/i965/
DgenX_state_upload.c2133 assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
2134 vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
2136 vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
2202 vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
2618 gs.DispatchMode = vue_prog_data->dispatch_mode;
4039 hs.DispatchMode = vue_prog_data->dispatch_mode;
4074 vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8);
4084 if (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8)
/external/mesa3d/src/intel/blorp/
Dblorp_genX_exec.h662 vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8); in blorp_emit_vs_config()
681 vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8; in blorp_emit_vs_config()
/external/mesa3d/src/gallium/drivers/iris/
Diris_state.c4340 hs.DispatchMode = vue_prog_data->dispatch_mode; in iris_store_tcs_state()