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Searched refs:dvp (Results 1 – 25 of 26) sorted by relevance

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/external/libevent/
Ddevpoll.c172 struct dvpoll dvp; in devpoll_dispatch() local
181 dvp.dp_fds = devpollop->events; in devpoll_dispatch()
182 dvp.dp_nfds = devpollop->nevents; in devpoll_dispatch()
183 dvp.dp_timeout = timeout; in devpoll_dispatch()
187 res = ioctl(devpollop->dpfd, DP_POLL, &dvp); in devpoll_dispatch()
/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.5a-predres-error.s4 dvp rctx label
12 dvp x1, x2 label
Darmv8.5a-predres.s6 dvp rctx, x1 label
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.5a-predres.txt10 # CHECK: dvp rctx, x1
/external/python/cpython3/Modules/
Dselectmodule.c926 struct dvpoll dvp; in select_devpoll_poll_impl() local
960 dvp.dp_fds = self->fds; in select_devpoll_poll_impl()
961 dvp.dp_nfds = self->max_n_fds; in select_devpoll_poll_impl()
962 dvp.dp_timeout = (int)ms; in select_devpoll_poll_impl()
971 poll_result = ioctl(self->fd_devpoll, DP_POLL, &dvp); in select_devpoll_poll_impl()
988 dvp.dp_timeout = (int)ms; in select_devpoll_poll_impl()
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s236 dvp # CHECK: dvp $zero # encoding: [0x00,0x00,0x19,0x7c]
237 dvp $4 # CHECK: dvp $4 # encoding: [0x00,0x04,0x19,0x7c]
Dinvalid.s161 dvp 3 # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
162 dvp $4, 5 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s316 dvp # CHECK: dvp $zero # encoding: [0x00,0x00,0x19,0x7c]
317 dvp $4 # CHECK: dvp $4 # encoding: [0x00,0x04,0x19,0x7c]
Dinvalid.s136 dvp 3 # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
137 dvp $4, 5 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt68 0x00 0x11 0x19 0x7c # CHECK: dvp $17
69 0x00 0x00 0x19 0x7c # CHECK: dvp $zero
309 0x00 0x00 0x19 0x7c # CHECK: dvp
310 0x00 0x04 0x19 0x7c # CHECK: dvp $4
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dvalid.s369 dvp # CHECK: dvp $zero # encoding: [0x00,0x00,0x19,0x7c]
370 dvp $4 # CHECK: dvp $4 # encoding: [0x00,0x04,0x19,0x7c]
Dinvalid.s139 dvp 3 # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
140 dvp $4, 5 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt93 0x24 0x00 0x71 0x41 # CHECK: dvp $17
94 0x24 0x00 0x60 0x41 # CHECK: dvp $zero
Dvalid-mips32r6.txt71 0x41 0x60 0x00 0x24 # CHECK: dvp $zero
75 0x41 0x71 0x00 0x24 # CHECK: dvp $17
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt119 0x24 0x00 0x71 0x41 # CHECK: dvp $17
120 0x24 0x00 0x60 0x41 # CHECK: dvp $zero
Dvalid-mips64r6.txt88 0x41 0x60 0x00 0x24 # CHECK: dvp $zero
94 0x41 0x71 0x00 0x24 # CHECK: dvp $17
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt236 0x00 0x00 0x19 0x7c # CHECK: dvp
237 0x00 0x04 0x19 0x7c # CHECK: dvp $4
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt301 0x00 0x00 0x19 0x7c # CHECK: dvp
302 0x00 0x04 0x19 0x7c # CHECK: dvp $4
/external/expat/conftools/
Dconfig.sub1198 | d10v | d30v | dlx | dsp16xx | dvp \
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td549 class DVP_DESC : DVPEVP_DESC_BASE<"dvp", II_DVP>;
993 def : MipsInstAlias<"dvp", (DVP ZERO), 0>, ISA_MIPS32R6;
DMicroMips32r6InstrInfo.td222 class DVP_MMR6_ENC : POOL32A_DVPEVP_FM_MMR6<"dvp", 0b0001100101>;
1255 class DVP_MMR6_DESC : DVPEVP_MMR6_DESC_BASE<"dvp", II_DVP>;
1678 def : MipsInstAlias<"dvp", (DVP_MMR6 ZERO), 0>, ISA_MICROMIPS32R6;
/external/llvm-project/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td549 class DVP_DESC : DVPEVP_DESC_BASE<"dvp", II_DVP>;
993 def : MipsInstAlias<"dvp", (DVP ZERO), 0>, ISA_MIPS32R6;
DMicroMips32r6InstrInfo.td222 class DVP_MMR6_ENC : POOL32A_DVPEVP_FM_MMR6<"dvp", 0b0001100101>;
1255 class DVP_MMR6_DESC : DVPEVP_MMR6_DESC_BASE<"dvp", II_DVP>;
1678 def : MipsInstAlias<"dvp", (DVP_MMR6 ZERO), 0>, ISA_MICROMIPS32R6;
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td220 class DVP_MMR6_ENC : POOL32A_DVPEVP_FM_MMR6<"dvp", 0b0001100101>;
1245 class DVP_MMR6_DESC : DVPEVP_MMR6_DESC_BASE<"dvp">;
1705 def : MipsInstAlias<"dvp", (DVP_MMR6 ZERO), 0>, ISA_MICROMIPS32R6;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc5000 "ub\005dsubi\005dsubu\003dvp\004dvpe\003ehb\002ei\003emt\004eret\006eret"
6518 { 3937 /* dvp */, Mips::DVP, Convert__regZERO, AMFBS_HasStdEnc_HasMips32r6, { }, },
6519 { 3937 /* dvp */, Mips::DVP_MMR6, Convert__regZERO, AMFBS_InMicroMips_HasMips32r6, { }, },
6520 …{ 3937 /* dvp */, Mips::DVP, Convert__GPR32AsmReg1_0, AMFBS_HasStdEnc_HasMips32r6, { MCK_GPR32AsmR…
6521 …{ 3937 /* dvp */, Mips::DVP_MMR6, Convert__GPR32AsmReg1_0, AMFBS_InMicroMips_HasMips32r6, { MCK_GP…
9772 { 3937 /* dvp */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_HasStdEnc_HasMips32r6 },
9773 { 3937 /* dvp */, 1 /* 0 */, MCK_GPR32AsmReg, AMFBS_InMicroMips_HasMips32r6 },

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