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Searched refs:f32_0 (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/amd/llvm/
Dac_llvm_cull.c66 neg_w = LLVMBuildFCmp(builder, LLVMRealOLT, pos[i][3], ctx->f32_0, ""); in ac_analyze_position_w()
106 accepted = LLVMBuildFCmp(builder, cond, det, ctx->f32_0, ""); in ac_cull_face()
109 accepted = LLVMBuildFCmp(builder, cond, det, ctx->f32_0, ""); in ac_cull_face()
111 accepted = LLVMBuildFCmp(builder, LLVMRealONE, det, ctx->f32_0, ""); in ac_cull_face()
Dac_llvm_build.c111 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0); in ac_llvm_context_init()
820 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, ""); in ac_prepare_cube_coords()
821 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, ""); in ac_prepare_cube_coords()
1620 loads[num_channels] = ac_to_integer(ctx, num_channels == 3 ? ctx->f32_1 : ctx->f32_0); in ac_build_opencoded_load_format()
2085 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 || !a->level_zero); in ac_build_image_opcode()
3697 return ctx->f32_0; in get_reduction_identity()
4494 pos.out[0] = pos.out[1] = pos.out[2] = pos.out[3] = ctx->f32_0; in ac_build_sendmsg_gs_alloc_req()
Dac_llvm_build.h109 LLVMValueRef f32_0; member
Dac_nir_to_llvm.c291 return LLVMBuildSelect(ctx->builder, src0, ctx->f32_1, ctx->f32_0, ""); in emit_b2f()
349 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, ""); in emit_f2f16()
361 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE, temp, ctx->f32_0, ""); in emit_f2f16()
363 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, ""); in emit_f2f16()
1301 LLVMValueRef default_offset = ctx->f32_0; in lower_gather4_integer()
4235 args.derivs[i] = ctx->ac.f32_0; in visit_tex()
4236 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0; in visit_tex()
/external/swiftshader/third_party/SPIRV-Tools/test/val/
Dval_ext_inst_test.cpp3264 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0\n";
3306 << " %f32_0 %f32_1\n";
3318 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0 %f32_1\n";
3344 "%val1 = OpExtInst %f32 %extinst " + ext_inst_name + " %f32_0 %u32_1\n";
3368 << " %f32_0 %f32_1 %f32_2\n";
3380 " %f32_0 %f32_1 %f32_2\n";
3393 " %u32_0 %f32_0 %f32_1\n";
3406 " %f32_0 %u32_0 %f32_1\n";
3419 " %f32_1 %f32_0 %u32_2\n";
3474 "%val1 = OpExtInst %s32 %extinst " + ext_inst_name + " %f32_0\n";
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/external/deqp-deps/SPIRV-Tools/test/val/
Dval_ext_inst_test.cpp3264 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0\n";
3306 << " %f32_0 %f32_1\n";
3318 "%val1 = OpExtInst %u32 %extinst " + ext_inst_name + " %f32_0 %f32_1\n";
3344 "%val1 = OpExtInst %f32 %extinst " + ext_inst_name + " %f32_0 %u32_1\n";
3368 << " %f32_0 %f32_1 %f32_2\n";
3380 " %f32_0 %f32_1 %f32_2\n";
3393 " %u32_0 %f32_0 %f32_1\n";
3406 " %f32_0 %u32_0 %f32_1\n";
3419 " %f32_1 %f32_0 %u32_2\n";
3474 "%val1 = OpExtInst %s32 %extinst " + ext_inst_name + " %f32_0\n";
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_llvm_vs.c397 const_chan == 0 ? ctx->ac.f32_0 : args->out[chan]); in si_llvm_emit_clipvertex()
600 pos_args[0].out[0] = ctx->ac.f32_0; /* X */ in si_llvm_build_vs_exports()
601 pos_args[0].out[1] = ctx->ac.f32_0; /* Y */ in si_llvm_build_vs_exports()
602 pos_args[0].out[2] = ctx->ac.f32_0; /* Z */ in si_llvm_build_vs_exports()
620 pos_args[1].out[0] = ctx->ac.f32_0; /* X */ in si_llvm_build_vs_exports()
621 pos_args[1].out[1] = ctx->ac.f32_0; /* Y */ in si_llvm_build_vs_exports()
622 pos_args[1].out[2] = ctx->ac.f32_0; /* Z */ in si_llvm_build_vs_exports()
623 pos_args[1].out[3] = ctx->ac.f32_0; /* W */ in si_llvm_build_vs_exports()
Dsi_shader_llvm_tess.c559 ctx->ac.f32_0, ctx->ac.f32_0}; in si_load_tess_coord()
/external/mesa3d/src/amd/vulkan/
Dradv_nir_to_llvm.c845 ctx->ac.f32_0, in load_tess_coord()
846 ctx->ac.f32_0, in load_tess_coord()
1084 LLVMValueRef zero = is_float ? ctx->ac.f32_0 : ctx->ac.i32_0; in radv_fixup_vertex_input_fetches()
1494 ctx->ac.f32_0, in si_llvm_init_export_args()
1787 pos_args[0].out[0] = ctx->ac.f32_0; /* X */ in radv_llvm_export_vs()
1788 pos_args[0].out[1] = ctx->ac.f32_0; /* Y */ in radv_llvm_export_vs()
1789 pos_args[0].out[2] = ctx->ac.f32_0; /* Z */ in radv_llvm_export_vs()
1802 pos_args[1].out[0] = ctx->ac.f32_0; /* X */ in radv_llvm_export_vs()
1803 pos_args[1].out[1] = ctx->ac.f32_0; /* Y */ in radv_llvm_export_vs()
1804 pos_args[1].out[2] = ctx->ac.f32_0; /* Z */ in radv_llvm_export_vs()
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