| /external/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 157 InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg())); in getDepth()
164 InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg())); in getDepth()
206 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
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| D | StackSlotColoring.cpp | 408 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 877 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
898 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
932 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
939 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 195 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth()
204 InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg())); in getDepth()
248 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
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| D | StackSlotColoring.cpp | 467 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
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| D | PeepholeOptimizer.cpp | 1514 unsigned Idx = MI.findRegisterUseOperandIdx(Reg); in findTargetRecurrence()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 195 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth()
204 InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg())); in getDepth()
248 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
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| D | StackSlotColoring.cpp | 468 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
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| D | FixupStatepointCallerSaved.cpp | 119 int Idx = RI->findRegisterUseOperandIdx(Reg, false, &TRI); in performCopyPropagation()
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| D | PeepholeOptimizer.cpp | 1512 unsigned Idx = MI.findRegisterUseOperandIdx(Reg); in findTargetRecurrence()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | MVEVPTOptimisationsPass.cpp | 410 if (Iter->findRegisterUseOperandIdx(Reg) != -1) { in MoveVPNOTBeforeFirstUser()
415 if (Iter->findRegisterUseOperandIdx(VPNOTResult) == -1) in MoveVPNOTBeforeFirstUser()
469 Iter->findRegisterUseOperandIdx(VCCRValue) != -1) { in ReduceOldVCCRValueUses()
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| D | ARMLowOverheadLoops.cpp | 92 return MI.findRegisterUseOperandIdx(ARM::VPR) != -1; in hasVPRUse()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 1190 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
1211 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
1245 int findRegisterUseOperandIdx(Register Reg, bool isKill = false,
1252 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 1301 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
1322 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
1357 int findRegisterUseOperandIdx(Register Reg, bool isKill = false,
1364 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600EmitClauseMarkers.cpp | 215 if (UseI->findRegisterUseOperandIdx(MOI->getReg())) in canClauseLocalKillFitInClause()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCPreEmitPeephole.cpp | 111 int KillIdx = AfterBBI->findRegisterUseOperandIdx(Reg, true, TRI); in removeRedundantLIs()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIPreEmitPeephole.cpp | 204 MI.RemoveOperand(MI.findRegisterUseOperandIdx(CondReg, false /*Kill*/, TRI)); in optimizeVccBranch()
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| D | SIWholeQuadMode.cpp | 963 int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
966 Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 427 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI); in fuseCompareOperations()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCPreEmitPeephole.cpp | 157 int KillIdx = AfterBBI->findRegisterUseOperandIdx(Reg, true, TRI); in removeRedundantLIs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 423 MI.RemoveOperand(MI.findRegisterUseOperandIdx(CondReg, false /*Kill*/, TRI)); in optimizeVccBranch()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 651 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI); in fuseCompareOperations()
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZElimCompare.cpp | 651 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI); in fuseCompareOperations()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 611 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, false, TRI); in genInstrWithNewOpc()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 612 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, false, TRI); in genInstrWithNewOpc()
|