/external/llvm-project/clang/test/CodeGen/ |
D | ppc64le-f128Aggregates.c | 10 struct fp5 { __float128 f[5]; }; argument 34 struct fp5 func_f5(struct fp5 x) { return x; } in func_f5() 84 struct fp5 global_f5;
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | lambda-conversion-op-cc.cpp | 17 double (*__attribute__((vectorcall)) fp5)(int, float, double) = lambda; in usage() local 24 fp5(0, 1.1, 2.2); in usage()
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/external/llvm-project/clang/test/CXX/expr/expr.prim/expr.prim.lambda/ |
D | p6.cpp | 16 void (*fp5)(int) noexcept = [](int x) { }; in test_conversion() local
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | 2010-05-12-FastAllocKills.ll | 12 …%fp1, implicit-def %fp2, implicit-def %fp3, implicit-def %fp4, implicit-def %fp5, implicit-def %fp6 26 …%fp1, implicit-def %fp2, implicit-def %fp3, implicit-def %fp4, implicit-def %fp5, implicit-def %fp6
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D | ipra-reg-usage.ll | 6 …r7 $dr8 $dr9 $dr10 $dr11 $dr12 $dr13 $dr14 $dr15 $fp0 $fp1 $fp2 $fp3 $fp4 $fp5 $fp6 $fp7 $k0 $k1 $…
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/external/llvm-project/clang/test/SemaCXX/ |
D | cxx1z-constexpr-lambdas.cpp | 119 constexpr int (*fp5)(int) = NCL; variable 121 fp5(5); //expected-note{{non-constexpr function}}
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D | cxx1y-generic-lambdas.cpp | 189 char (*fp5)(char) = [](auto e) -> int { return e; }; //expected-error{{no viable conversion}}\ in test() local
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/external/clang/test/SemaTemplate/ |
D | member-template-access-expr.cpp | 73 float* (*fp5)(float) = &X1::f2<float>; in test_X1() local
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/external/llvm-project/clang/test/SemaTemplate/ |
D | member-template-access-expr.cpp | 73 float* (*fp5)(float) = &X1::f2<float>; in test_X1() local
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/external/clang/test/SemaCXX/ |
D | cxx1y-generic-lambdas.cpp | 185 char (*fp5)(char) = [](auto e) -> int { return e; }; //expected-error{{no viable conversion}}\ in test() local
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/external/elfutils/tests/ |
D | run-readelf-mixed-corenote.sh | 645 fp4: 0x7fff0000ffffffffffffffff fp5: 0x7fff0000ffffffffffffffff
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D | run-allregs.sh | 2832 21: %fp5 (fp5), float 96 bits
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 167 def FP5 : X86Reg<"fp5", 0>;
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 207 def FP5 : X86Reg<"fp5", 0>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 207 def FP5 : X86Reg<"fp5", 0>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
D | X86GenAsmMatcher.inc | 310 return 108; // "fp5"
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