Searched refs:fsrw (Results 1 – 4 of 4) sorted by relevance
| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rv64zbt-valid.s | 18 # CHECK-ASM-AND-OBJ: fsrw t0, t1, t2, t3
20 fsrw t0, t1, t2, t3 label
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| D | rv64zbt-invalid.s | 6 fsrw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | rv64Zbt.ll | 212 ; RV64IB-NEXT: fsrw a0, a1, a0, a2
218 ; RV64IBT-NEXT: fsrw a0, a1, a0, a2
240 ; RV64IB-NEXT: fsrw a0, a1, a0, a2
247 ; RV64IBT-NEXT: fsrw a0, a1, a0, a2
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoB.td | 408 def FSRW : RVBTernaryR<0b10, 0b101, OPC_OP_32, "fsrw",
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