Home
last modified time | relevance | path

Searched refs:funct3 (Results 1 – 17 of 17) sorted by relevance

/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrFormatsC.td51 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
58 let Inst{15-13} = funct3;
67 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
74 let Inst{15-13} = funct3;
79 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
85 let Inst{15-13} = funct3;
93 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
99 let Inst{15-13} = funct3;
108 class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
114 let Inst{15-13} = funct3;
[all …]
DRISCVInstrFormats.td185 class RVInstR<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode, dag outs,
195 let Inst{14-12} = funct3;
206 bits<3> funct3;
213 let Inst{14-12} = funct3;
218 class RVInstRAtomic<bits<5> funct5, bit aq, bit rl, bits<3> funct3,
231 let Inst{14-12} = funct3;
241 bits<3> funct3;
247 let Inst{14-12} = funct3;
252 class RVInstI<bits<3> funct3, RISCVOpcode opcode, dag outs, dag ins,
261 let Inst{14-12} = funct3;
[all …]
DRISCVInstrInfoA.td37 class LR_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
38 : RVInstRAtomic<0b00010, aq, rl, funct3, OPC_AMO,
44 multiclass LR_r_aq_rl<bits<3> funct3, string opcodestr> {
45 def "" : LR_r<0, 0, funct3, opcodestr>;
46 def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
47 def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
48 def _AQ_RL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
52 class AMO_rr<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr>
53 : RVInstRAtomic<funct5, aq, rl, funct3, OPC_AMO,
57 multiclass AMO_rr_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr> {
[all …]
DRISCVInstrInfoF.td53 (ins FPR32:$rs1, FPR32:$rs2, FPR32:$rs3, frmarg:$funct3),
54 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
61 class FPALUS_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
62 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR32:$rd),
68 (ins FPR32:$rs1, FPR32:$rs2, frmarg:$funct3), opcodestr,
69 "$rd, $rs1, $rs2, $funct3">;
76 class FPUnaryOp_r<bits<7> funct7, bits<3> funct3, RegisterClass rdty,
78 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd), (ins rs1ty:$rs1),
85 (ins rs1ty:$rs1, frmarg:$funct3), opcodestr,
86 "$rd, $rs1, $funct3">;
[all …]
DRISCVInstrInfoZfh.td37 (ins FPR16:$rs1, FPR16:$rs2, FPR16:$rs3, frmarg:$funct3),
38 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
45 class FPALUH_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
46 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR16:$rd),
52 (ins FPR16:$rs1, FPR16:$rs2, frmarg:$funct3), opcodestr,
53 "$rd, $rs1, $rs2, $funct3">;
60 class FPCmpH_rr<bits<3> funct3, string opcodestr>
61 : RVInstR<0b1010010, funct3, OPC_OP_FP, (outs GPR:$rd),
DRISCVInstrInfoD.td35 (ins FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, frmarg:$funct3),
36 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
43 class FPALUD_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
44 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR64:$rd),
50 (ins FPR64:$rs1, FPR64:$rs2, frmarg:$funct3), opcodestr,
51 "$rd, $rs1, $rs2, $funct3">;
58 class FPCmpD_rr<bits<3> funct3, string opcodestr>
59 : RVInstR<0b1010001, funct3, OPC_OP_FP, (outs GPR:$rd),
DRISCVInstrInfo.td346 class BranchCC_rri<bits<3> funct3, string opcodestr>
347 : RVInstB<funct3, OPC_BRANCH, (outs),
356 class Load_ri<bits<3> funct3, string opcodestr>
357 : RVInstI<funct3, OPC_LOAD, (outs GPR:$rd), (ins GPR:$rs1, simm12:$imm12),
364 class Store_rri<bits<3> funct3, string opcodestr>
365 : RVInstS<funct3, OPC_STORE, (outs),
370 class ALU_ri<bits<3> funct3, string opcodestr>
371 : RVInstI<funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1, simm12:$imm12),
376 class Shift_ri<bit arithshift, bits<3> funct3, string opcodestr>
377 : RVInstIShift<arithshift, funct3, OPC_OP_IMM, (outs GPR:$rd),
[all …]
DRISCVInstrInfoC.td222 class CStackLoad<bits<3> funct3, string OpcodeStr,
224 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SP:$rs1, opnd:$imm),
228 class CStackStore<bits<3> funct3, string OpcodeStr,
230 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SP:$rs1, opnd:$imm),
234 class CLoad_ri<bits<3> funct3, string OpcodeStr,
236 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRC:$rs1, opnd:$imm),
240 class CStore_rri<bits<3> funct3, string OpcodeStr,
242 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2, GPRC:$rs1, opnd:$imm),
246 class Bcz<bits<3> funct3, string OpcodeStr,
248 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
DRISCVInstrInfoB.td108 class RVBUnary<bits<7> funct7, bits<5> funct5, bits<3> funct3,
110 : RVInstR<funct7, funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1),
116 class RVBALUW_ri<bits<3> funct3, string opcodestr>
117 : RVInstI<funct3, OPC_OP_IMM_32, (outs GPR:$rd),
121 class RVBShift_ri<bits<5> funct5, bits<3> funct3, RISCVOpcode opcode,
123 : RVInstI<funct3, opcode, (outs GPR:$rd),
137 class RVBShiftW_ri<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode,
139 : RVInstI<funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1, uimm5:$shamt),
148 class RVBShfl_ri<bits<6> funct6, bits<3> funct3, RISCVOpcode opcode,
150 : RVInstI<funct3, opcode, (outs GPR:$rd), (ins GPR:$rs1, shfl_uimm:$shamt),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrFormatsC.td51 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
58 let Inst{15-13} = funct3;
67 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
74 let Inst{15-13} = funct3;
79 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
85 let Inst{15-13} = funct3;
93 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
99 let Inst{15-13} = funct3;
108 class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
114 let Inst{15-13} = funct3;
[all …]
DRISCVInstrFormats.td145 class RVInstR<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode, dag outs,
155 let Inst{14-12} = funct3;
166 bits<3> funct3;
173 let Inst{14-12} = funct3;
178 class RVInstRAtomic<bits<5> funct5, bit aq, bit rl, bits<3> funct3,
191 let Inst{14-12} = funct3;
201 bits<3> funct3;
207 let Inst{14-12} = funct3;
212 class RVInstI<bits<3> funct3, RISCVOpcode opcode, dag outs, dag ins,
221 let Inst{14-12} = funct3;
[all …]
DRISCVInstrInfoA.td37 class LR_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
38 : RVInstRAtomic<0b00010, aq, rl, funct3, OPC_AMO,
44 multiclass LR_r_aq_rl<bits<3> funct3, string opcodestr> {
45 def "" : LR_r<0, 0, funct3, opcodestr>;
46 def _AQ : LR_r<1, 0, funct3, opcodestr # ".aq">;
47 def _RL : LR_r<0, 1, funct3, opcodestr # ".rl">;
48 def _AQ_RL : LR_r<1, 1, funct3, opcodestr # ".aqrl">;
52 class AMO_rr<bits<5> funct5, bit aq, bit rl, bits<3> funct3, string opcodestr>
53 : RVInstRAtomic<funct5, aq, rl, funct3, OPC_AMO,
57 multiclass AMO_rr_aq_rl<bits<5> funct5, bits<3> funct3, string opcodestr> {
[all …]
DRISCVInstrInfoF.td53 (ins FPR32:$rs1, FPR32:$rs2, FPR32:$rs3, frmarg:$funct3),
54 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
61 class FPALUS_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
62 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR32:$rd),
69 (ins FPR32:$rs1, FPR32:$rs2, frmarg:$funct3), opcodestr,
70 "$rd, $rs1, $rs2, $funct3">;
77 class FPUnaryOp_r<bits<7> funct7, bits<3> funct3, RegisterClass rdty,
79 : RVInstR<funct7, funct3, OPC_OP_FP, (outs rdty:$rd), (ins rs1ty:$rs1),
86 (ins rs1ty:$rs1, frmarg:$funct3), opcodestr,
87 "$rd, $rs1, $funct3">;
[all …]
DRISCVInstrInfoD.td35 (ins FPR64:$rs1, FPR64:$rs2, FPR64:$rs3, frmarg:$funct3),
36 opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
43 class FPALUD_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
44 : RVInstR<funct7, funct3, OPC_OP_FP, (outs FPR64:$rd),
51 (ins FPR64:$rs1, FPR64:$rs2, frmarg:$funct3), opcodestr,
52 "$rd, $rs1, $rs2, $funct3">,
60 class FPCmpD_rr<bits<3> funct3, string opcodestr>
61 : RVInstR<0b1010001, funct3, OPC_OP_FP, (outs GPR:$rd),
DRISCVInstrInfo.td298 class BranchCC_rri<bits<3> funct3, string opcodestr>
299 : RVInstB<funct3, OPC_BRANCH, (outs),
308 class Load_ri<bits<3> funct3, string opcodestr>
309 : RVInstI<funct3, OPC_LOAD, (outs GPR:$rd), (ins GPR:$rs1, simm12:$imm12),
316 class Store_rri<bits<3> funct3, string opcodestr>
317 : RVInstS<funct3, OPC_STORE, (outs),
322 class ALU_ri<bits<3> funct3, string opcodestr>
323 : RVInstI<funct3, OPC_OP_IMM, (outs GPR:$rd), (ins GPR:$rs1, simm12:$imm12),
328 class Shift_ri<bit arithshift, bits<3> funct3, string opcodestr>
329 : RVInstIShift<arithshift, funct3, OPC_OP_IMM, (outs GPR:$rd),
[all …]
DRISCVInstrInfoC.td218 class CStackLoad<bits<3> funct3, string OpcodeStr,
220 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SP:$rs1, opnd:$imm),
224 class CStackStore<bits<3> funct3, string OpcodeStr,
226 : RVInst16CSS<funct3, 0b10, (outs), (ins cls:$rs2, SP:$rs1, opnd:$imm),
230 class CLoad_ri<bits<3> funct3, string OpcodeStr,
232 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRC:$rs1, opnd:$imm),
236 class CStore_rri<bits<3> funct3, string OpcodeStr,
238 : RVInst16CS<funct3, 0b00, (outs), (ins cls:$rs2, GPRC:$rs1, opnd:$imm),
242 class Bcz<bits<3> funct3, string OpcodeStr, PatFrag CondOp,
244 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
/external/llvm-project/compiler-rt/lib/sanitizer_common/
Dsanitizer_linux.cpp1949 unsigned funct3 = (faulty_instruction >> 12) & 0x7; // bits 12-14, inclusive in GetWriteFlag() local
1952 switch (funct3) { in GetWriteFlag()
1966 switch (funct3) { in GetWriteFlag()
1979 switch (funct3) { in GetWriteFlag()
1989 switch (funct3) { in GetWriteFlag()