| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 150 PrivateSegmentBufferUserSGPR = TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
157 DispatchPtrUserSGPR = TRI.getMatchingSuperReg( in addDispatchPtr()
164 QueuePtrUserSGPR = TRI.getMatchingSuperReg( in addQueuePtr()
171 KernargSegmentPtrUserSGPR = TRI.getMatchingSuperReg( in addKernargSegmentPtr()
178 FlatScratchInitUserSGPR = TRI.getMatchingSuperReg( in addFlatScratchInit()
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| D | R600ControlFlowFinalizer.cpp | 295 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
304 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 190 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
197 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
204 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
212 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
219 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
226 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
233 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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| D | R600ControlFlowFinalizer.cpp | 310 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
319 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 207 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
214 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
221 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
229 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
236 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
243 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
250 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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| D | R600ControlFlowFinalizer.cpp | 309 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
318 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
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| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /external/llvm-project/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1908 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1910 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg()
1933 unsigned DestRegX = TRI->getMatchingSuperReg(DestReg, AArch64::sub_32, in copyPhysReg()
1935 unsigned SrcRegX = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_32, in copyPhysReg()
2057 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
2059 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg()
2074 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
2076 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
2091 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
2093 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 499 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function
501 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 516 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg() function
518 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /external/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 73 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 535 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function
537 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 88 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 1133 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1151 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1163 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1251 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1267 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1278 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 73 return TRI.getMatchingSuperReg(CopiedPReg, Sub, rc); in copyHint()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 79 return tri.getMatchingSuperReg(CopiedPReg, sub, rc); in copyHint()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2513 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2515 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2539 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2541 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2701 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
2703 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg()
2718 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
2720 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
2735 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
2737 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2778 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2780 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2804 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2806 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
2995 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::dsub, in copyPhysReg()
2997 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::dsub, in copyPhysReg()
3012 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
3014 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
3029 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
3031 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 1248 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1267 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1282 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1380 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1398 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1411 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 1241 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1260 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1275 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills()
1373 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1391 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
1404 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 87 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
|
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 347 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 88 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
|