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Searched refs:greviw (Results 1 – 4 of 4) sorted by relevance

/external/llvm-project/llvm/test/MC/RISCV/
Drv64zbp-invalid.s13 greviw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
15 greviw t0, t1, 32 # CHECK: :[[@LINE]]:16: error: immediate must be an integer in the range [0, 31] label
16 greviw t0, t1, -1 # CHECK: :[[@LINE]]:16: error: immediate must be an integer in the range [0, 31] label
Drv64zbp-valid.s24 # CHECK-ASM-AND-OBJ: greviw t0, t1, 0
26 greviw t0, t1, 0 label
/external/llvm-project/llvm/test/CodeGen/RISCV/
Drv64Zbp.ll1337 ; RV64IB-NEXT: greviw a0, a0, 1
1342 ; RV64IBP-NEXT: greviw a0, a0, 1
1414 ; RV64IB-NEXT: greviw a0, a0, 2
1419 ; RV64IBP-NEXT: greviw a0, a0, 2
1500 ; RV64IB-NEXT: greviw a0, a0, 3
1505 ; RV64IBP-NEXT: greviw a0, a0, 3
1608 ; RV64IB-NEXT: greviw a0, a0, 4
1613 ; RV64IBP-NEXT: greviw a0, a0, 4
1694 ; RV64IB-NEXT: greviw a0, a0, 5
1699 ; RV64IBP-NEXT: greviw a0, a0, 5
[all …]
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfoB.td402 def GREVIW : RVBShiftW_ri<0b0110100, 0b101, OPC_OP_IMM_32, "greviw">, Sched<[]>;