Searched refs:hw_ctx (Results 1 – 14 of 14) sorted by relevance
| /external/mesa3d/src/intel/tools/ |
| D | aub_write.c | 520 struct aub_hw_context *hw_ctx, in write_engine_execlist_setup() argument
536 hw_ctx->ring_addr = ggtt_addr; in write_engine_execlist_setup()
546 hw_ctx->pphwsp_addr = ggtt_addr; in write_engine_execlist_setup()
557 .ring_addr = hw_ctx->ring_addr, in write_engine_execlist_setup()
566 hw_ctx->initialized = true; in write_engine_execlist_setup()
658 struct aub_hw_context *hw_ctx = &ctx->hw_contexts[engine_class]; in aub_write_ensure_context() local
659 if (!hw_ctx->initialized) in aub_write_ensure_context()
660 write_engine_execlist_setup(aub, ctx->id, hw_ctx, engine_class); in aub_write_ensure_context()
662 return hw_ctx; in aub_write_ensure_context()
668 struct aub_hw_context *hw_ctx) in get_context_descriptor() argument
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_reset.c | 38 struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx }; in brw_get_graphics_reset_status()
44 assert(brw->hw_ctx != 0); in brw_get_graphics_reset_status()
79 struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx }; in brw_check_for_reset()
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| D | brw_context.c | 1071 brw->hw_ctx = brw_create_hw_context(brw->bufmgr); in brwCreateContext()
1072 if (!brw->hw_ctx && devinfo->gen >= 6) { in brwCreateContext()
1078 if (brw->hw_ctx) { in brwCreateContext()
1091 brw_hw_context_set_priority(brw->bufmgr, brw->hw_ctx, hw_priority)) { in brwCreateContext()
1228 brw_destroy_hw_context(brw->bufmgr, brw->hw_ctx); in intelDestroyContext()
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| D | brw_performance_query.c | 508 brw->hw_ctx, brw->screen->fd); in brw_init_perf_query_info()
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| D | intel_batchbuffer.c | 577 if (brw->hw_ctx == 0) { in brw_new_batch()
826 ret = execbuffer(brw->screen->fd, batch, brw->hw_ctx, in submit_batch()
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| D | brw_misc_state.c | 346 assert(brw->hw_ctx); in brw_emit_depthbuffer()
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| D | brw_state_upload.c | 161 if (!brw->hw_ctx) in brw_upload_initial_gpu_state()
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| D | brw_context.h | 725 uint32_t hw_ctx; member
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| /external/mesa3d/src/intel/perf/ |
| D | gen_perf_query.h | 42 uint32_t hw_ctx,
53 uint32_t hw_ctx,
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| D | gen_perf_query.c | 249 uint32_t hw_ctx; member
554 uint32_t hw_ctx, in gen_perf_init_context() argument
561 perf_ctx->hw_ctx = hw_ctx; in gen_perf_init_context()
774 perf_ctx->hw_ctx)) in gen_perf_begin_query()
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| /external/mesa3d/docs/relnotes/ |
| D | 10.1.2.rst | 37 Assertion \`brw->hw_ctx != ((void \*)0)' failed
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_debug.c | 592 if (!ws->ctx_wait_idle(queue->hw_ctx, ring, queue->queue_idx)) in radv_gpu_hang_occured()
900 ws->ctx_wait_idle(queue->hw_ctx, ring, queue->queue_idx); in radv_check_trap_handler()
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| D | radv_device.c | 2369 queue->hw_ctx = NULL; in radv_queue_init()
2371 VkResult result = device->ws->ctx_create(device->ws, queue->priority, &queue->hw_ctx); in radv_queue_init()
2400 if (queue->hw_ctx) in radv_queue_finish()
2401 queue->device->ws->ctx_destroy(queue->hw_ctx); in radv_queue_finish()
4530 struct radeon_winsys_ctx *ctx = queue->hw_ctx; in radv_queue_submit_deferred()
4859 struct radeon_winsys_ctx *ctx = queue->hw_ctx; in radv_queue_internal_submit()
4987 if (!queue->device->ws->ctx_wait_idle(queue->hw_ctx, in radv_QueueWaitIdle()
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| D | radv_private.h | 701 struct radeon_winsys_ctx *hw_ctx; member
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