1 #ifndef GEN8_RENDER_H
2 #define GEN8_RENDER_H
3 
4 #include "gen7_render.h"
5 
6 # define GEN8_WM_LEGACY_DIAMOND_LINE_RASTERIZATION	(1 << 26)
7 
8 #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS	GEN4_3D(3, 0, 0xf)
9 #define GEN8_3DSTATE_STENCIL_BUFFER		GEN4_3D(3, 0, 0x06)
10 #define GEN8_3DSTATE_HIER_DEPTH_BUFFER		GEN4_3D(3, 0, 0x07)
11 #define GEN8_3DSTATE_MULTISAMPLE		GEN4_3D(3, 0, 0x0d)
12 # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_2			(1 << 1)
13 
14 #define GEN8_3DSTATE_WM_HZ_OP			GEN4_3D(3, 0, 0x52)
15 
16 #define GEN8_3DSTATE_VF_INSTANCING		GEN4_3D(3, 0, 0x49)
17 # define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH	(1 << 29)
18 # define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET	(1 << 28)
19 # define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT   5
20 #define GEN8_3DSTATE_SBE_SWIZ			GEN4_3D(3, 0, 0x51)
21 #define GEN8_3DSTATE_RASTER			GEN4_3D(3, 0, 0x50)
22 # define GEN8_RASTER_FRONT_WINDING_CCW			(1 << 21)
23 # define GEN8_RASTER_CULL_NONE                          (1 << 16)
24 
25 # define GEN8_SF_POINT_WIDTH_FROM_SOURCE                (1 << 11)
26 
27 # define GEN8_VS_FLOATING_POINT_MODE_ALTERNATE          (1 << 16)
28 
29 #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP	\
30 						GEN4_3D(3, 0, 0x21)
31 #define GEN8_3DSTATE_PS_BLEND			GEN4_3D(3, 0, 0x4d)
32 # define GEN8_PS_BLEND_HAS_WRITEABLE_RT			(1 << 30)
33 #define GEN8_3DSTATE_WM_DEPTH_STENCIL		GEN4_3D(3, 0, 0x4e)
34 #define GEN8_3DSTATE_PS_EXTRA			GEN4_3D(3, 0, 0x4f)
35 # define GEN8_PSX_PIXEL_SHADER_VALID			(1 << 31)
36 # define GEN8_PSX_ATTRIBUTE_ENABLE			(1 << 8)
37 
38 #define GEN8_3DSTATE_DS_STATE_POINTERS		GEN4_3D(3, 0, 0x25)
39 
40 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS	GEN4_3D(3, 0, 0x2c)
41 #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS	GEN4_3D(3, 0, 0x2d)
42 
43 #define GEN8_3DSTATE_VF				GEN4_3D(3, 0, 0x0c)
44 #define GEN8_3DSTATE_VF_TOPOLOGY		GEN4_3D(3, 0, 0x4b)
45 
46 #define GEN8_3DSTATE_BIND_TABLE_POOL_ALLOC	GEN4_3D(3, 1, 0x19)
47 #define GEN8_3DSTATE_GATHER_POOL_ALLOC		GEN4_3D(3, 1, 0x1a)
48 #define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC	GEN4_3D(3, 1, 0x1b)
49 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS	GEN4_3D(3, 1, 0x13)
50 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS	GEN4_3D(3, 1, 0x14)
51 #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS	GEN4_3D(3, 1, 0x15)
52 
53 #define GEN8_3DSTATE_VF_SGVS			GEN4_3D(3, 0, 0x4a)
54 #define GEN8_3DSTATE_SO_DECL_LIST		GEN4_3D(3, 1, 0x17)
55 #define GEN8_3DSTATE_SO_BUFFER			GEN4_3D(3, 1, 0x18)
56 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0	GEN4_3D(3, 1, 0x02)
57 #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1	GEN4_3D(3, 1, 0x0c)
58 
59 /* Some random bits that we care about */
60 #define GEN8_VB0_BUFFER_ADDR_MOD_EN		(1 << 14)
61 #define GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11)
62 #define GEN8_3DSTATE_PS_ATTRIBUTE_ENABLED	 (1 << 10)
63 
64 /* Random shifts */
65 #define GEN8_3DSTATE_PS_MAX_THREADS_SHIFT 23
66 
67 /* STATE_BASE_ADDRESS state size in pages*/
68 #define GEN8_STATE_SIZE_PAGES(x) ((x) << 12)
69 
70 #define BDW_MOCS_PTE		(0 << 5)
71 #define BDW_MOCS_UC		(1 << 5)
72 #define BDW_MOCS_WT		(2 << 5)
73 #define BDW_MOCS_WB		(3 << 5)
74 #define BDW_MOCS_TC_ELLC	(0 << 3)
75 #define BDW_MOCS_TC_LLC		(1 << 3)
76 #define BDW_MOCS_TC_LLC_ELLC	(2 << 3)
77 #define BDW_MOCS_TC_L3_PTE	(3 << 3)
78 #define BDW_MOCS_AGE(x)		((x) << 0)
79 
80 #define CHV_MOCS_UC		(0 << 5)
81 #define CHV_MOCS_WB		(3 << 5)
82 #define CHV_MOCS_NO_CACHING	(0 << 3)
83 #define CHV_MOCS_L3		(3 << 3)
84 
85 /* Shamelessly ripped from mesa */
86 struct gen8_surface_state
87 {
88 	struct {
89 		uint32_t cube_pos_z:1;
90 		uint32_t cube_neg_z:1;
91 		uint32_t cube_pos_y:1;
92 		uint32_t cube_neg_y:1;
93 		uint32_t cube_pos_x:1;
94 		uint32_t cube_neg_x:1;
95 		uint32_t media_boundary_pixel_mode:2;
96 		uint32_t render_cache_read_write:1;
97 		uint32_t smapler_l2_bypass:1;
98 		uint32_t vert_line_stride_ofs:1;
99 		uint32_t vert_line_stride:1;
100 		uint32_t tiled_mode:2;
101 		uint32_t horizontal_alignment:2;
102 		uint32_t vertical_alignment:2;
103 		uint32_t surface_format:9;     /**< BRW_SURFACEFORMAT_x */
104 		uint32_t pad0:1;
105 		uint32_t is_array:1;
106 		uint32_t surface_type:3;       /**< BRW_SURFACE_1D/2D/3D/CUBE */
107 	} ss0;
108 
109 	struct {
110 		uint32_t qpitch:15;
111 		uint32_t pad1:4;
112 		uint32_t base_mip_level:5;
113 		uint32_t memory_object_control:7;
114 		uint32_t pad0:1;
115 	} ss1;
116 
117 	struct {
118 		uint32_t width:14;
119 		uint32_t pad1:2;
120 		uint32_t height:14;
121 		uint32_t pad0:2;
122 	} ss2;
123 
124 	struct {
125 		uint32_t pitch:18;
126 		uint32_t pad:3;
127 		uint32_t depth:11;
128 	} ss3;
129 
130 	struct {
131 		uint32_t minimum_array_element:27;
132 		uint32_t pad0:5;
133 	} ss4;
134 
135 	struct {
136 		uint32_t mip_count:4;
137 		uint32_t min_lod:4;
138 		uint32_t pad3:6;
139 		uint32_t coherency_type:1;
140 		uint32_t pad2:5;
141 		uint32_t ewa_disable_for_cube:1;
142 		uint32_t y_offset:3;
143 		uint32_t pad0:1;
144 		uint32_t x_offset:7;
145 	} ss5;
146 
147 	struct {
148 		uint32_t aux_mode:3;
149 		uint32_t aux_pitch:9;
150 		uint32_t pad0:4;
151 		uint32_t aux_qpitch:15;
152 		uint32_t pad1:1;
153 	} ss6;
154 
155 	struct {
156 		uint32_t resource_min_lod:12;
157 
158 		/* Only on Haswell */
159 		uint32_t pad0:4;
160 		uint32_t shader_chanel_select_a:3;
161 		uint32_t shader_chanel_select_b:3;
162 		uint32_t shader_chanel_select_g:3;
163 		uint32_t shader_chanel_select_r:3;
164 
165 		uint32_t alpha_clear_color:1;
166 		uint32_t blue_clear_color:1;
167 		uint32_t green_clear_color:1;
168 		uint32_t red_clear_color:1;
169 	} ss7;
170 
171 	struct {
172 		uint32_t base_addr;
173 	} ss8;
174 
175 	struct {
176 		uint32_t base_addr_hi;
177 	} ss9;
178 
179 	struct {
180 		uint32_t aux_base_addr;
181 	} ss10;
182 
183 	struct {
184 		uint32_t aux_base_addr_hi;
185 	} ss11;
186 
187 	struct {
188 		uint32_t hiz_depth_clear_value;
189 	} ss12;
190 
191 	struct {
192 		uint32_t reserved;
193 	} ss13;
194 
195 	struct {
196 		uint32_t reserved;
197 	} ss14;
198 
199 	struct {
200 		uint32_t reserved;
201 	} ss15;
202 };
203 
204 struct gen8_sampler_state
205 {
206 	struct
207 	{
208 		uint32_t aniso_algorithm:1;
209 		uint32_t lod_bias:13;
210 		uint32_t min_filter:3;
211 		uint32_t mag_filter:3;
212 		uint32_t mip_filter:2;
213 		uint32_t base_level:5;
214 		uint32_t lod_preclamp:2;
215 		uint32_t default_color_mode:1;
216 		uint32_t pad0:1;
217 		uint32_t disable:1;
218 	} ss0;
219 
220 	struct
221 	{
222 		uint32_t cube_control_mode:1;
223 		uint32_t shadow_function:3;
224 		uint32_t chromakey_mode:1;
225 		uint32_t chromakey_index:2;
226 		uint32_t chromakey_enable:1;
227 		uint32_t max_lod:12;
228 		uint32_t min_lod:12;
229 	} ss1;
230 
231 	struct
232 	{
233 		uint32_t lod_clamp_mag_mode:1;
234 		uint32_t flexible_filter_valign:1;
235 		uint32_t flexible_filter_halign:1;
236 		uint32_t flexible_filter_coeff_size:1;
237 		uint32_t flexible_filter_mode:1;
238 		uint32_t pad1:1;
239 		uint32_t indirect_state_ptr:18;
240 		uint32_t pad0:2;
241 		uint32_t sep_filter_height:2;
242 		uint32_t sep_filter_width:2;
243 		uint32_t sep_filter_coeff_table_size:2;
244 	} ss2;
245 
246 	struct
247 	{
248 		uint32_t r_wrap_mode:3;
249 		uint32_t t_wrap_mode:3;
250 		uint32_t s_wrap_mode:3;
251 		uint32_t pad:1;
252 		uint32_t non_normalized_coord:1;
253 		uint32_t trilinear_quality:2;
254 		uint32_t address_round:6;
255 		uint32_t max_aniso:3;
256 		uint32_t pad0:2;
257 		uint32_t non_sep_filter_footprint_mask:8;
258 	} ss3;
259 };
260 
261 struct gen8_blend_state {
262 	struct {
263 		uint32_t pad0:19;
264 		uint32_t y_dither_offset:2;
265 		uint32_t x_dither_offset:2;
266 		uint32_t dither_enable:1;
267 		uint32_t alpha_test_func:3;
268 		uint32_t alpha_test:1;
269 		uint32_t alpha_to_coverage_dither:1;
270 		uint32_t alpha_to_one:1;
271 		uint32_t ia_blend:1;
272 		uint32_t alpha_to_coverage:1;
273 	} bs0;
274 
275 	struct {
276 		uint32_t write_disable_blue:1;
277 		uint32_t write_disable_green:1;
278 		uint32_t write_disable_red:1;
279 		uint32_t write_disable_alpha:1;
280 		uint32_t pad1:1;
281 		uint32_t alpha_blend_func:3;
282 		uint32_t dest_alpha_blend_factor:5;
283 		uint32_t source_alpha_blend_factor:5;
284 		uint32_t color_blend_func:3;
285 		uint32_t dest_blend_factor:5;
286 		uint32_t source_blend_factor:5;
287 		uint32_t color_buffer_blend:1;
288 		uint32_t post_blend_color_clamp:1;
289 		uint32_t pre_blend_color_clamp:1;
290 		uint32_t color_clamp_range:2;
291 		uint32_t pre_blend_source_only_clamp:1;
292 		uint32_t pad0:22;
293 		uint32_t logic_op_func:4;
294 		uint32_t logic_op_enable:1;
295 	} bs[16];
296 };
297 
298 struct gen7_sf_clip_viewport {
299 	struct {
300 		float m00;
301 		float m11;
302 		float m22;
303 		float m30;
304 		float m31;
305 		float m32;
306 	} viewport;
307 
308 	uint32_t pad0[2];
309 
310 	struct {
311 		float xmin;
312 		float xmax;
313 		float ymin;
314 		float ymax;
315 	} guardband;
316 
317 	float pad1[4];
318 };
319 
320 struct gen6_scissor_rect
321 {
322 	uint32_t xmin:16;
323 	uint32_t ymin:16;
324 	uint32_t xmax:16;
325 	uint32_t ymax:16;
326 };
327 
328 #endif
329