Searched refs:imm14 (Results 1 – 8 of 8) sorted by relevance
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | constants-i64.ll | 344 define i64 @imm14() #0 {
345 ; CHECK-LABEL: imm14:
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 616 void tbz(const Register& rt, unsigned bit_pos, int64_t imm14);
622 void tbnz(const Register& rt, unsigned bit_pos, int64_t imm14);
5978 static Instr ImmTestBranch(int64_t imm14) { in ImmTestBranch() argument
5979 VIXL_ASSERT(IsInt14(imm14)); in ImmTestBranch()
5980 return TruncateToUint14(imm14) << ImmTestBranch_offset; in ImmTestBranch()
6198 static Instr SysOp(int imm14) { in SysOp() argument
6199 VIXL_ASSERT(IsUint14(imm14)); in SysOp()
6200 return imm14 << SysOp_offset; in SysOp()
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| D | assembler-aarch64.cc | 420 void Assembler::tbz(const Register& rt, unsigned bit_pos, int64_t imm14) { in tbz() argument
422 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbz()
433 void Assembler::tbnz(const Register& rt, unsigned bit_pos, int64_t imm14) { in tbnz() argument
435 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt)); in tbnz()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 529 // <|EXTEND|imm10:4|imm14:11|RRI-A|rx|ry|f|imm3:0>
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 528 // <|EXTEND|imm10:4|imm14:11|RRI-A|rx|ry|f|imm3:0>
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 528 // <|EXTEND|imm10:4|imm14:11|RRI-A|rx|ry|f|imm3:0>
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| /external/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
| D | EmulateInstructionARM64.cpp | 1162 bits(64) offset = SignExtend(imm14:'00', 64); in EmulateTBZ()
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3063 void tbnz(const Register& rt, unsigned bit_pos, int64_t imm14)
3077 void tbz(const Register& rt, unsigned bit_pos, int64_t imm14)
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