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Searched refs:index_mode (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_bc_dump.cpp174 static const char *index_mode[] = {"", " CF_INDEX_0", " CF_INDEX_1"}; in dump() local
181 (((kc.addr + kc.mode) << 4) - 1) << index_mode[kc.index_mode] << "]"; in dump()
212 static void print_sel(sb_ostream &s, int sel, int rel, int index_mode, in print_sel() argument
214 if (rel && index_mode >= 5 && sel < 128) in print_sel()
221 if (index_mode == 0 || index_mode == 6) in print_sel()
223 else if (index_mode == 4) in print_sel()
242 print_sel(s, sel, alu.dst_rel, alu.index_mode, 0); in print_dst()
366 print_sel(s, sel, src->rel, alu.index_mode, need_brackets); in print_src()
Dsb_bc.h430 unsigned index_mode; member
485 kc[0].index_mode != KC_INDEX_NONE || kc[1].index_mode != KC_INDEX_NONE || in is_alu_extended()
486 kc[2].index_mode != KC_INDEX_NONE || kc[3].index_mode != KC_INDEX_NONE; in is_alu_extended()
522 unsigned index_mode:3; member
552 index_mode = 0; in clear()
Dsb_sched.cpp927 unsigned index_mode = f->bc.sampler_index_mode != V_SQ_CF_INDEX_NONE ? in process_fetch() local
938 load_index_register(v, index_mode); in process_fetch()
1463 unsigned index_mode = v->select.kcache_index_mode(); in map_src_vec() local
1464 if (index_mode == KC_INDEX_0 || index_mode == KC_INDEX_1) { in map_src_vec()
1465 ubo_indexing[index_mode - KC_INDEX_0] = true; in map_src_vec()
2116 unsigned index_mode = rp[i] >> 29; in get_lines() local
2123 line |= index_mode << 29; in get_lines()
2138 unsigned index_mode = *I >> 29; in update_kc() local
2142 assert(index_mode <= KC_INDEX_INVALID); in update_kc()
2146 kc[c-1].index_mode == index_mode) in update_kc()
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Dsb_bc_builder.cpp216 .KCACHE_BANK_INDEX_MODE0(bc.kc[0].index_mode) in build_cf_alu()
217 .KCACHE_BANK_INDEX_MODE1(bc.kc[1].index_mode) in build_cf_alu()
218 .KCACHE_BANK_INDEX_MODE2(bc.kc[2].index_mode) in build_cf_alu()
219 .KCACHE_BANK_INDEX_MODE3(bc.kc[3].index_mode) in build_cf_alu()
389 .INDEX_MODE(bc.index_mode) in build_alu()
410 .INDEX_MODE(bc.index_mode) in build_alu()
Dsb_bc_decoder.cpp147 bc.kc[0].index_mode = w0.get_KCACHE_BANK_INDEX_MODE0(); in decode_cf_alu()
148 bc.kc[1].index_mode = w0.get_KCACHE_BANK_INDEX_MODE1(); in decode_cf_alu()
149 bc.kc[2].index_mode = w0.get_KCACHE_BANK_INDEX_MODE2(); in decode_cf_alu()
150 bc.kc[3].index_mode = w0.get_KCACHE_BANK_INDEX_MODE3(); in decode_cf_alu()
297 bc.index_mode = w0.get_INDEX_MODE(); in decode_alu()
316 bc.index_mode = iw0.get_INDEX_MODE(); in decode_alu()
Dsb_bc_parser.cpp459 assert(!n->bc.dst_rel || n->bc.index_mode == INDEX_AR_X); in prepare_alu_group()
509 …n->src[s] = sh->get_kcache_value(kc.bank, kc_addr, src.chan, (alu_kcache_index_mode)kc.index_mode); in prepare_alu_group()
511 if (kc.index_mode != KC_INDEX_NONE) { in prepare_alu_group()
512 assert(kc.index_mode != KC_LOCK_LOOP); in prepare_alu_group()
513 ubo_indexing[kc.index_mode - KC_INDEX_0] = true; in prepare_alu_group()
Dsb_shader.cpp192 …:get_kcache_value(unsigned bank, unsigned index, unsigned chan, alu_kcache_index_mode index_mode) { in get_kcache_value() argument
194 sel_chan(bank, index, chan, index_mode)); in get_kcache_value()
Dsb_shader.h326 …* get_kcache_value(unsigned bank, unsigned index, unsigned chan, alu_kcache_index_mode index_mode);
Dsb_ir.h71 unsigned chan, alu_kcache_index_mode index_mode) in sel_chan()
72 : id(sel_chan((bank << 12) | index | ((unsigned)index_mode << 28), chan).id) {} in sel_chan()
Dsb_expr.cpp366 if (b0.index_mode != b1.index_mode) in ops_equal()
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_value.h45 PrintFlags():index_mode(0), in PrintFlags()
49 PrintFlags(int im, int f):index_mode(im), in PrintFlags()
53 int index_mode; member
Dsfn_ir_to_assembly.cpp722 auto index_mode = fetch_instr.buffer_index_mode(); in emit_vtx() local
729 index_mode = emit_index_reg(*addr, 0); in emit_vtx()
765 vtx.buffer_index_mode = index_mode; in emit_vtx()
1057 cf->rat.index_mode = rat_index_mode; in emit_rat()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_asm.c957 unsigned bank, unsigned line, unsigned index_mode) in r600_bytecode_alloc_kcache_line() argument
980 kcache[i].index_mode = index_mode; in r600_bytecode_alloc_kcache_line()
1010 kcache[i].index_mode = index_mode; in r600_bytecode_alloc_kcache_line()
1024 unsigned bank, line, sel = alu->src[i].sel, index_mode; in r600_bytecode_alloc_inst_kcache_lines() local
1032 index_mode = alu->src[i].kc_rel ? 1 : 0; // V_SQ_CF_INDEX_0 / V_SQ_CF_INDEX_NONE in r600_bytecode_alloc_inst_kcache_lines()
1034 if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line, index_mode))) in r600_bytecode_alloc_inst_kcache_lines()
1107 kcache[0].index_mode || kcache[1].index_mode || kcache[2].index_mode || kcache[3].index_mode) { in r600_bytecode_alloc_kcache_lines()
1152 alu.index_mode = INDEX_MODE_LOOP; in load_ar_r6xx()
1631 S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) | in r600_bytecode_alu_build()
1905 static int print_sel(unsigned sel, unsigned rel, unsigned index_mode, in print_sel() argument
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Deg_asm.c46 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE0(cf->kcache[0].index_mode) | in eg_bytecode_cf_build()
47 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE1(cf->kcache[1].index_mode) | in eg_bytecode_cf_build()
48 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE2(cf->kcache[2].index_mode) | in eg_bytecode_cf_build()
49 S_SQ_CF_ALU_WORD0_EXT_KCACHE_BANK_INDEX_MODE3(cf->kcache[3].index_mode) | in eg_bytecode_cf_build()
104 S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE(cf->rat.index_mode) | in eg_bytecode_cf_build()
272 S_SQ_ALU_WORD0_INDEX_MODE(alu->index_mode) | in eg_bytecode_alu_build()
Dr600_asm.h67 unsigned index_mode; member
179 unsigned index_mode; member
186 unsigned index_mode; member
Dr700_asm.c92 alu->index_mode = G_SQ_ALU_WORD0_INDEX_MODE(word0); in r700_bytecode_alu_read()
Dr600_shader.c8909 cf->rat.index_mode = rat_index_mode; in tgsi_load_rat()
9053 cf->rat.index_mode = rat_index_mode; in tgsi_store_buffer_rat()
9111 cf->rat.index_mode = rat_index_mode; in tgsi_store_rat()
9282 cf->rat.index_mode = rat_index_mode; in tgsi_atomic_op_rat()
/external/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td74 bits<3> index_mode = 0;
89 let Word0{28-26} = index_mode;
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td83 bits<3> index_mode = 0;
98 let Word0{28-26} = index_mode;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td83 bits<3> index_mode = 0;
98 let Word0{28-26} = index_mode;