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Searched refs:isFP64bit (Results 1 – 25 of 50) sorted by relevance

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/external/llvm-project/llvm/lib/Target/Mips/
DMipsSubtarget.cpp106 if (hasMSA() && !isFP64bit()) in MipsSubtarget()
111 if (isFP64bit() && !hasMips64() && hasMips32() && !hasMips32r2()) in MipsSubtarget()
145 assert(isFP64bit()); in MipsSubtarget()
DMipsRegisterInfo.cpp114 if (Subtarget.isFP64bit()) in getCalleeSavedRegs()
136 if (Subtarget.isFP64bit()) in getCallPreservedMask()
181 if (Subtarget.isFP64bit()) { in getReservedRegs()
DMipsCallingConv.td109 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCAssignToReg<[D0_64, D2_64]>>>,
110 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()", CCAssignToReg<[D0, D1]>>>
117 CCIfSubtargetNot<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP32>>,
118 CCIfSubtarget<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP64>>
225 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()",
228 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"useOddSPReg()",
235 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"noOddSPReg()",
DMipsInstructionSelector.cpp137 return STI.isFP64bit() ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in getRegClassForTypeOnBank()
230 if (STI.isFP64bit()) in selectLoadStoreOpCode()
555 STI.isFP64bit() ? Mips::ExtractElementF64_64 : Mips::ExtractElementF64; in select()
618 STI.isFP64bit() ? Mips::BuildPairF64_64 : Mips::BuildPairF64, in select()
631 : STI.isFP64bit() ? Mips::FABS_D64 : Mips::FABS_D32; in select()
649 Opcode = STI.isFP64bit() ? Mips::TRUNC_W_D64 : Mips::TRUNC_W_D32; in select()
880 : STI.isFP64bit() ? Mips::FCMP_D64 : Mips::FCMP_D32; in select()
DMipsSubtarget.h284 bool isFP64bit() const { return IsFP64bit; } in isFP64bit() function
DMipsSEFrameLowering.cpp315 !Subtarget.isFP64bit()); in expandBuildPairF64()
381 !Subtarget.isFP64bit()); in expandExtractElementF64()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSubtarget.cpp106 if (hasMSA() && !isFP64bit()) in MipsSubtarget()
111 if (isFP64bit() && !hasMips64() && hasMips32() && !hasMips32r2()) in MipsSubtarget()
145 assert(isFP64bit()); in MipsSubtarget()
DMipsRegisterInfo.cpp114 if (Subtarget.isFP64bit()) in getCalleeSavedRegs()
136 if (Subtarget.isFP64bit()) in getCallPreservedMask()
181 if (Subtarget.isFP64bit()) { in getReservedRegs()
DMipsCallingConv.td109 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCAssignToReg<[D0_64, D2_64]>>>,
110 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()", CCAssignToReg<[D0, D1]>>>
117 CCIfSubtargetNot<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP32>>,
118 CCIfSubtarget<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP64>>
225 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()",
228 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"useOddSPReg()",
235 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"noOddSPReg()",
DMipsInstructionSelector.cpp131 return STI.isFP64bit() ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in getRegClassForTypeOnBank()
224 if (STI.isFP64bit()) in selectLoadStoreOpCode()
519 STI.isFP64bit() ? Mips::BuildPairF64_64 : Mips::BuildPairF64, in select()
532 : STI.isFP64bit() ? Mips::FABS_D64 : Mips::FABS_D32; in select()
550 Opcode = STI.isFP64bit() ? Mips::TRUNC_W_D64 : Mips::TRUNC_W_D32; in select()
781 : STI.isFP64bit() ? Mips::FCMP_D64 : Mips::FCMP_D32; in select()
DMipsSubtarget.h281 bool isFP64bit() const { return IsFP64bit; } in isFP64bit() function
DMipsCallLowering.cpp147 .buildInstr(STI.isFP64bit() ? Mips::BuildPairF64_64 in assignValueToReg()
259 .buildInstr(STI.isFP64bit() ? Mips::ExtractElementF64_64 in assignValueToReg()
267 .buildInstr(STI.isFP64bit() ? Mips::ExtractElementF64_64 in assignValueToReg()
DMipsSEFrameLowering.cpp315 !Subtarget.isFP64bit()); in expandBuildPairF64()
381 !Subtarget.isFP64bit()); in expandExtractElementF64()
/external/llvm/lib/Target/Mips/
DMipsSubtarget.cpp97 if (hasMSA() && !isFP64bit()) in MipsSubtarget()
111 assert(isFP64bit()); in MipsSubtarget()
DMipsRegisterInfo.cpp118 if (Subtarget.isFP64bit()) in getCalleeSavedRegs()
140 if (Subtarget.isFP64bit()) in getCallPreservedMask()
186 if (Subtarget.isFP64bit()) { in getReservedRegs()
DMipsCallingConv.td104 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCAssignToReg<[D0_64, D2_64]>>>,
105 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()", CCAssignToReg<[D0, D1]>>>
112 CCIfSubtargetNot<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP32>>,
113 CCIfSubtarget<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP64>>
219 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()",
222 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"useOddSPReg()",
229 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"noOddSPReg()",
DMipsSubtarget.h223 bool isFP64bit() const { return IsFP64bit; } in isFP64bit() function
DMipsSEInstrInfo.cpp626 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg())); in expandExtractElementF64()
677 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg())); in expandBuildPairF64()
DMipsSEFrameLowering.cpp291 !Subtarget.isFP64bit()); in expandBuildPairF64()
354 !Subtarget.isFP64bit()); in expandExtractElementF64()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h140 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32; in setCPR1SizeFromPredicates()
178 else if (P.isFP64bit()) in setFpAbiFromPredicates()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h137 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32; in setCPR1SizeFromPredicates()
185 else if (P.isFP64bit()) in setFpAbiFromPredicates()
/external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h137 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32; in setCPR1SizeFromPredicates()
185 else if (P.isFP64bit()) in setFpAbiFromPredicates()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc330 if ((Subtarget->inMicroMipsMode()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())) {
333 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit())) {
336 …if ((Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())…
339 …if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()…
449 if ((Subtarget->inMicroMipsMode()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())) {
452 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit())) {
455 …if ((Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat())…
458 …if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()…
499 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->isFP64bit())) {
502 if ((Subtarget->inMicroMipsMode()) && (Subtarget->isFP64bit())) {
[all …]
DMipsGenCallingConv.inc373 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
378 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
392 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
404 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
418 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
817 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
829 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
DMipsGenDAGISel.inc69 …ate, 0, // (Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (Subtarget->isFP64bit())
77 …tternPredicate, 1, // (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarge…
85 …ternPredicate, 2, // (Subtarget->hasStandardEncoding()) && (!Subtarget->isFP64bit()) && (!Subtarge…
93 … OPC_CheckPatternPredicate, 3, // (Subtarget->inMicroMipsMode()) && (!Subtarget->isFP64bit())
110 …target->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarge…
117 …->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarge…
381 …arget->hasMips2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarge…
389 …>hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarge…
397 … 20, // (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit())
405 …target->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (Subtarget->isFP64bit()) && (!Subtarge…
[all …]

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