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Searched refs:isTop (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCMachineScheduler.cpp29 SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand; in biasAddiLoadCandidate()
30 SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand; in biasAddiLoadCandidate()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.h186 MaxPath = std::max(MaxPath, isTop() ? SU.getHeight() : SU.getDepth()); in init()
191 bool isTop() const { in isTop() function
212 unsigned PathLength = isTop() ? SU->getHeight() : SU->getDepth(); in isLatencyBound()
DHexagonMachineScheduler.cpp376 if (isTop()) in bumpCycle()
394 if (!isTop() && SU->isCall) { in bumpNode()
403 startNewCycle = ResourceModel->reserveResources(SU, isTop()); in bumpNode()
428 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
467 return !ResourceModel->isResourceAvailable(*Available.begin(), isTop()) || in pickOnlyChoice()
468 getWeakLeft(*Available.begin(), isTop()) != 0; in pickOnlyChoice()
474 ResourceModel->reserveResources(nullptr, isTop()); in pickOnlyChoice()
DHexagonConstPropagation.cpp162 bool isTop() const { return Kind == Top; } in isTop() function in __anone2ca9bd80111::LatticeCell
213 assert(Top.isTop()); in CellMap()
469 uint32_t Ps = !isTop() ? properties() in convertToProperty()
506 } else if (isTop()) { in print()
526 if (isBottom() || L.isTop()) in meet()
528 if (isTop()) { in meet()
607 assert(!isTop() && "Should not call this for a top cell"); in properties()
2216 assert(!Input.isTop()); in evaluate()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.h186 MaxPath = std::max(MaxPath, isTop() ? SU.getHeight() : SU.getDepth()); in init()
191 bool isTop() const { in isTop() function
212 unsigned PathLength = isTop() ? SU->getHeight() : SU->getDepth(); in isLatencyBound()
DHexagonMachineScheduler.cpp376 if (isTop()) in bumpCycle()
394 if (!isTop() && SU->isCall) { in bumpNode()
403 startNewCycle = ResourceModel->reserveResources(SU, isTop()); in bumpNode()
428 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
467 return !ResourceModel->isResourceAvailable(*Available.begin(), isTop()) || in pickOnlyChoice()
468 getWeakLeft(*Available.begin(), isTop()) != 0; in pickOnlyChoice()
474 ResourceModel->reserveResources(nullptr, isTop()); in pickOnlyChoice()
DHexagonConstPropagation.cpp163 bool isTop() const { return Kind == Top; } in isTop() function in __anon11e3d3c40111::LatticeCell
214 assert(Top.isTop()); in CellMap()
468 uint32_t Ps = !isTop() ? properties() in convertToProperty()
505 } else if (isTop()) { in print()
525 if (isBottom() || L.isTop()) in meet()
527 if (isTop()) { in meet()
606 assert(!isTop() && "Should not call this for a top cell"); in properties()
2221 assert(!Input.isTop()); in evaluate()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineScheduler.cpp1936 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in getLatencyStallCycles()
1951 if (!isTop()) in getNextResourceCycleByInstance()
2006 ((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) || in checkHazard()
2007 (!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) { in checkHazard()
2009 << (isTop() ? "begin" : "end") << " group\n"); in checkHazard()
2143 if (isTop()) in bumpCycle()
2208 if (!isTop() && SU->isCall) { in bumpNode()
2225 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in bumpNode()
2290 if (isTop()) { in bumpNode()
2300 unsigned &TopLatency = isTop() ? ExpectedLatency : DependentLatency; in bumpNode()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCMachineScheduler.cpp35 SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand; in biasAddiLoadCandidate()
36 SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand; in biasAddiLoadCandidate()
/external/llvm-project/llvm/lib/CodeGen/
DMachineScheduler.cpp2072 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in getLatencyStallCycles()
2087 if (!isTop()) in getNextResourceCycleByInstance()
2142 ((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) || in checkHazard()
2143 (!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) { in checkHazard()
2145 << (isTop() ? "begin" : "end") << " group\n"); in checkHazard()
2279 if (isTop()) in bumpCycle()
2344 if (!isTop() && SU->isCall) { in bumpNode()
2361 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in bumpNode()
2426 if (isTop()) { in bumpNode()
2436 unsigned &TopLatency = isTop() ? ExpectedLatency : DependentLatency; in bumpNode()
[all …]
/external/llvm/lib/CodeGen/
DMachineScheduler.cpp1829 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in getLatencyStallCycles()
1844 if (!isTop()) in getNextResourceCycle()
2006 if (isTop()) in bumpCycle()
2068 if (!isTop() && SU->isCall) { in bumpNode()
2083 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in bumpNode()
2145 if (isTop()) { in bumpNode()
2156 unsigned &TopLatency = isTop() ? ExpectedLatency : DependentLatency; in bumpNode()
2157 unsigned &BotLatency = isTop() ? DependentLatency : ExpectedLatency; in bumpNode()
2204 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
2504 if (Zone.isTop()) { in tryLatency()
[all …]
/external/llvm-project/llvm/include/llvm/CodeGen/
DMachineScheduler.h698 bool isTop() const { in isTop() function
719 return isTop() ? SU->getHeight() : SU->getDepth(); in getUnscheduledLatency()
935 unsigned getWeakLeft(const SUnit *SU, bool isTop);
936 int biasPhysReg(const SUnit *SU, bool isTop);
1014 void reschedulePhysReg(SUnit *SU, bool isTop);
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineScheduler.h695 bool isTop() const { in isTop() function
716 return isTop() ? SU->getHeight() : SU->getDepth(); in getUnscheduledLatency()
932 unsigned getWeakLeft(const SUnit *SU, bool isTop);
933 int biasPhysReg(const SUnit *SU, bool isTop);
1011 void reschedulePhysReg(SUnit *SU, bool isTop);
/external/llvm/include/llvm/CodeGen/
DMachineScheduler.h664 bool isTop() const { in isTop() function
689 return isTop() ? SU->getHeight() : SU->getDepth(); in getUnscheduledLatency()
946 void reschedulePhysRegCopies(SUnit *SU, bool isTop);
/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp316 if (isTop()) in bumpCycle()
334 if (!isTop() && SU->isCall) { in bumpNode()
368 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
DHexagonMachineScheduler.h171 bool isTop() const { in isTop() function
/external/cldr/tools/java/org/unicode/cldr/icu/
DLDML2ICUBinaryWriter.java756 resTop.isTop = true; in writeKeyString()
845 if (!resTop.isTop && resTop.hasKey) { in buildKeyList()
DICUResourceWriter.java116 public boolean isTop = false; field in ICUResourceWriter.Resource
126 isTop = false; in Resource()
/external/deqp/modules/gles3/accuracy/
Des3aTextureFilteringTests.cpp498 bool isTop = face >= 3; in renderFaces() local
502 int curH = isTop ? (height-curY) : (height / 2); in renderFaces()
/external/deqp/modules/gles2/accuracy/
Des2aTextureFilteringTests.cpp489 bool isTop = face >= 3; in renderFaces() local
493 int curH = isTop ? (height-curY) : (height / 2); in renderFaces()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNSchedStrategy.cpp154 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, SRI, in pickNodeFromQueue()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DGCNSchedStrategy.cpp156 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, SRI, in pickNodeFromQueue()
/external/error_prone/checkerframework/
Ddataflow-2.5.3.jarMETA-INF/ META-INF/MANIFEST.MF org/ org/checkerframework/ org/ ...
/external/guice/extensions/struts2/lib/
Djsp-2.1.jarMETA-INF/ META-INF/MANIFEST.MF org/ org/apache/ org/ ...