1 // Copyright 2015, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
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6 //
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8 //     this list of conditions and the following disclaimer.
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11 //     and/or other materials provided with the distribution.
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13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
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26 
27 
28 // ---------------------------------------------------------------------
29 // This file is auto generated using tools/generate_simulator_traces.py.
30 //
31 // PLEASE DO NOT EDIT.
32 // ---------------------------------------------------------------------
33 
34 #ifndef VIXL_SIM_FCVTMU_WS_TRACE_AARCH64_H_
35 #define VIXL_SIM_FCVTMU_WS_TRACE_AARCH64_H_
36 
37 const uint32_t kExpected_fcvtmu_ws[] = {
38   0u,
39   0u,
40   0u,
41   0u,
42   0u,
43   0u,
44   1u,
45   1u,
46   1u,
47   10u,
48   0u,
49   4294967295u,
50   0u,
51   0u,
52   0u,
53   0u,
54   0u,
55   0u,
56   0u,
57   0u,
58   0u,
59   0u,
60   0u,
61   0u,
62   0u,
63   0u,
64   0u,
65   0u,
66   0u,
67   0u,
68   0u,
69   0u,
70   0u,
71   0u,
72   0u,
73   0u,
74   0u,
75   0u,
76   8388608u,
77   8388609u,
78   8388610u,
79   8388611u,
80   16143410u,
81   16777212u,
82   16777213u,
83   16777214u,
84   16777215u,
85   4194304u,
86   4194304u,
87   4194305u,
88   4194305u,
89   8071705u,
90   8388606u,
91   8388606u,
92   8388607u,
93   8388607u,
94   2097152u,
95   2097152u,
96   2097152u,
97   2097152u,
98   4035852u,
99   4194303u,
100   4194303u,
101   4194303u,
102   4194303u,
103   0u,
104   0u,
105   0u,
106   0u,
107   0u,
108   0u,
109   0u,
110   0u,
111   0u,
112   0u,
113   0u,
114   0u,
115   0u,
116   0u,
117   0u,
118   0u,
119   0u,
120   0u,
121   0u,
122   0u,
123   0u,
124   0u,
125   0u,
126   0u,
127   0u,
128   0u,
129   0u,
130   0u,
131   0u,
132   0u,
133   4294967295u,
134   4294967295u,
135   4294967295u,
136   4294967295u,
137   0u,
138   0u,
139   0u,
140   2147483520u,
141   2147483648u,
142 };
143 const unsigned kExpectedCount_fcvtmu_ws = 104;
144 
145 #endif  // VIXL_SIM_FCVTMU_WS_TRACE_AARCH64_H_
146