1 // Copyright 2015, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 
28 // ---------------------------------------------------------------------
29 // This file is auto generated using tools/generate_simulator_traces.py.
30 //
31 // PLEASE DO NOT EDIT.
32 // ---------------------------------------------------------------------
33 
34 #ifndef VIXL_SIM_FRINT32Z_S_TRACE_AARCH64_H_
35 #define VIXL_SIM_FRINT32Z_S_TRACE_AARCH64_H_
36 
37 const uint32_t kExpected_frint32z_s[] = {
38   0x00000000,
39   0x00000000,
40   0x00000000,
41   0x00000000,
42   0x00000000,
43   0x00000000,
44   0x3f800000,
45   0x3f800000,
46   0x3f800000,
47   0x41200000,
48   0xcf000000,
49   0xcf000000,
50   0xcf000000,
51   0xcf000000,
52   0xcf000000,
53   0xcf000000,
54   0x00000000,
55   0x00000000,
56   0x00000000,
57   0x80000000,
58   0x80000000,
59   0x80000000,
60   0x80000000,
61   0x80000000,
62   0x80000000,
63   0xbf800000,
64   0xbf800000,
65   0xbf800000,
66   0xc1200000,
67   0xcf000000,
68   0xcf000000,
69   0xcf000000,
70   0xcf000000,
71   0xcf000000,
72   0xcf000000,
73   0x80000000,
74   0x80000000,
75   0x80000000,
76   0x4b000000,
77   0x4b000001,
78   0x4b000002,
79   0x4b000003,
80   0x4b765432,
81   0x4b7ffffc,
82   0x4b7ffffd,
83   0x4b7ffffe,
84   0x4b7fffff,
85   0x4a800000,
86   0x4a800000,
87   0x4a800002,
88   0x4a800002,
89   0x4af65432,
90   0x4afffffc,
91   0x4afffffc,
92   0x4afffffe,
93   0x4afffffe,
94   0x4a000000,
95   0x4a000000,
96   0x4a000000,
97   0x4a000000,
98   0x4a765430,
99   0x4a7ffffc,
100   0x4a7ffffc,
101   0x4a7ffffc,
102   0x4a7ffffc,
103   0xcb000000,
104   0xcb000001,
105   0xcb000002,
106   0xcb000003,
107   0xcb765432,
108   0xcb7ffffc,
109   0xcb7ffffd,
110   0xcb7ffffe,
111   0xcb7fffff,
112   0xca800000,
113   0xca800000,
114   0xca800002,
115   0xca800002,
116   0xcaf65432,
117   0xcafffffc,
118   0xcafffffc,
119   0xcafffffe,
120   0xcafffffe,
121   0xca000000,
122   0xca000000,
123   0xca000000,
124   0xca000000,
125   0xca765430,
126   0xca7ffffc,
127   0xca7ffffc,
128   0xca7ffffc,
129   0xca7ffffc,
130   0xcf000000,
131   0xcf000000,
132   0xcf000000,
133   0xcf000000,
134   0xcf000000,
135   0xcf000000,
136   0xcf000000,
137   0xcf000000,
138   0xcf000000,
139   0xceffffff,
140   0x4effffff,
141   0xcf000000,
142 };
143 const unsigned kExpectedCount_frint32z_s = 104;
144 
145 #endif  // VIXL_SIM_FRINT32Z_S_TRACE_AARCH64_H_
146