/external/capstone/ |
D | MCInst.c | 101 return op->Kind == kRegister; in MCOperand_isReg() 150 op->Kind = kRegister; in MCOperand_CreateReg1() 161 op->Kind = kRegister; in MCOperand_CreateReg0()
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D | MCInst.h | 33 kRegister, ///< Register operand. enumerator
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/external/llvm/include/llvm/MC/ |
D | MCInst.h | 36 kRegister, ///< Register operand. enumerator 56 bool isReg() const { return Kind == kRegister; } in isReg() 113 Op.Kind = kRegister; in createReg()
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
D | MCInst.h | 37 kRegister, ///< Register operand. enumerator 57 bool isReg() const { return Kind == kRegister; } in isReg() 117 Op.Kind = kRegister; in createReg()
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/external/llvm-project/llvm/include/llvm/MC/ |
D | MCInst.h | 37 kRegister, ///< Register operand. enumerator 57 bool isReg() const { return Kind == kRegister; } in isReg() 117 Op.Kind = kRegister; in createReg()
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/external/vixl/src/aarch64/ |
D | registers-aarch64.h | 83 kRegister, enumerator 185 bool IsRegister() const { return GetType() == kRegister; } in IsRegister() 199 return kRegister; in GetType() 381 case kRegister: in GetBankFor() 537 : CPURegister(code, size_in_bits, kRegister) { in VIXL_DECLARE_REGISTER_COMMON()
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D | operands-aarch64.cc | 72 if (GetType() == CPURegister::kRegister) { in RemoveCalleeSaved() 116 return CPURegList(CPURegister::kRegister, size, 19, 29); in GetCalleeSaved() 127 CPURegList list = CPURegList(CPURegister::kRegister, size, 0, 18); in GetCallerSaved()
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D | operands-aarch64.h | 64 ((type == CPURegister::kRegister) && (last_reg < kNumberOfRegisters)) || in CPURegList() 88 if (type == CPURegister::kRegister) { 273 if (type == CPURegister::kRegister) size = kXRegSize; in GetDefaultSizeFor()
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D | macro-assembler-aarch64.cc | 2532 CPURegList(CPURegister::kRegister, kXRegSize, 1, arg_count); in PrintfNoPreserve() 2877 VIXL_ASSERT(available->GetType() == CPURegister::kRegister); in Open() 2940 if (list.GetType() == CPURegister::kRegister) { in Include()
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D | disasm-aarch64.cc | 9854 CPURegister::RegisterType reg_type = CPURegister::kRegister; in SubstituteRegisterField() 9872 reg_type = CPURegister::kRegister; in SubstituteRegisterField() 9876 reg_type = CPURegister::kRegister; in SubstituteRegisterField()
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D | macro-assembler-aarch64.h | 919 CPURegister::RegisterType type = CPURegister::kRegister) { 924 CPURegister::RegisterType type = CPURegister::kRegister) { 979 CPURegister::RegisterType type = CPURegister::kRegister) { 986 CPURegister::RegisterType type = CPURegister::kRegister) {
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/external/capstone/arch/TMS320C64x/ |
D | TMS320C64xDisassembler.c | 429 if(op->Kind == kRegister) { in DecodeSide() 497 if(op->Kind == kRegister) { in DecodeCrosspathX1() 529 if(op->Kind == kRegister) { in DecodeCrosspathX2() 561 if(op->Kind == kRegister) { in DecodeCrosspathX3()
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/external/vixl/benchmarks/aarch64/ |
D | bench-utils.cc | 253 __ StoreCPURegList(CPURegList(CPURegister::kRegister, size, store_list), in GenerateMemOperandSequence() 256 __ LoadCPURegList(CPURegList(CPURegister::kRegister, size, load_list), in GenerateMemOperandSequence()
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/external/vixl/test/aarch64/ |
D | test-api-aarch64.cc | 323 VIXL_CHECK(CPURegister(0, kWRegSize, CPURegister::kRegister).Is(w0)); in TEST() 324 VIXL_CHECK(CPURegister(1, kXRegSize, CPURegister::kRegister).Is(x1)); in TEST() 1271 expected_(GetGuardListFor(CPURegister::kRegister)), in ScratchScopeHelper() 1323 if (type == CPURegister::kRegister) list &= ~(xzr.GetBit() | sp.GetBit()); in GetPotentialListFor() 1332 case CPURegister::kRegister: in GetExpectedFor() 1359 CPURegister::kRegister); in TEST() 1395 CPURegister::kRegister); in TEST() 1431 CPURegister::kRegister); in TEST()
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D | test-utils-aarch64.cc | 592 if (reg_list.GetType() == CPURegister::kRegister) { in Clobber()
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D | test-assembler-sve-aarch64.cc | 8921 if (base_type == CPURegister::kRegister) { in Ldff1Helper() 9074 CPURegister::kRegister, in TEST_SVE() 9098 CPURegister::kRegister, in TEST_SVE()
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D | test-assembler-aarch64.cc | 4182 CPURegList inputs(CPURegister::kRegister, kXRegSize, 10, 18); in TEST()
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