| /external/llvm/test/CodeGen/AArch64/ |
| D | cmpxchg-O0.ll | 21 ; CHECK: ldaxrh [[OLD:w[0-9]+]], [x0]
|
| D | atomic-ops.ll | 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
622 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
719 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
914 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
|
| D | arm64-ldxr-stxr.ll | 188 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | arm64-ldxr-stxr.ll | 232 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
238 ; GISEL: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
|
| D | cmpxchg-O0.ll | 26 ; CHECK: ldaxrh [[OLD:w[0-9]+]], {{\[}}[[ADDR]]{{\]}}
|
| D | atomic-ops.ll | 60 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
627 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
895 ; OUTLINE_ATOMICS-NEXT: ldaxrh w10, [x9]
910 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
1049 ; OUTLINE_ATOMICS-NEXT: ldaxrh w8, [x9]
1063 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
1358 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
|
| D | arm64_32-atomics.ll | 130 ; CHECK: ldaxrh w0, [x0]
|
| D | atomic-ops-lse.ll | 427 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
586 ; OUTLINE-ATOMICS-NEXT: ldaxrh w8, [x9]
745 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
904 ; OUTLINE-ATOMICS-NEXT: ldaxrh w8, [x9]
3596 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
3756 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
4236 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
4396 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
4556 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
5036 ; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 513 ldaxrh w2, [x4]
520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
|
| D | basic-a64-instructions.s | 2295 ldaxrh w20, [sp]
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 513 ldaxrh w2, [x4]
520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
|
| D | basic-a64-instructions.s | 2278 ldaxrh w20, [sp]
|
| /external/vixl/ |
| D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1603 COMPARE(ldaxrh(w15, MemOperand(x16)), "ldaxrh w15, [x16]"); in TEST()
1604 COMPARE(ldaxrh(w17, MemOperand(sp)), "ldaxrh w17, [sp]"); in TEST()
1605 COMPARE(ldaxrh(x18, MemOperand(x19)), "ldaxrh w18, [x19]"); in TEST()
1606 COMPARE(ldaxrh(x20, MemOperand(sp)), "ldaxrh w20, [sp]"); in TEST()
|
| D | test-trace-aarch64.cc | 166 __ ldaxrh(w17, MemOperand(x0)); in GenerateTestSequenceBase() local
167 __ ldaxrh(x18, MemOperand(x0)); in GenerateTestSequenceBase() local
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 873 ldaxrh w7, [x5] label
2130 # CHECK-NEXT: 1 3 1.00 * * U ldaxrh w7, [x5]
3313 … - - - - - - - - - 1.00 - - ldaxrh w7, [x5]
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 893 0xf4,0xff,0x5f,0x48 = ldaxrh w20, [sp]
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
|
| D | log-disasm-colour | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
|
| D | log-cpufeatures-custom | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
|
| D | log-cpufeatures | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
|
| D | log-cpufeatures-colour | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1336 void ldaxrh(const Register& rt, const MemOperand& src);
|