| /external/llvm/test/MC/AArch64/ |
| D | armv8.1a-lor.s | 9 ldlarh w0,[x1]
37 ldlarh x0,[x1]
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.1a-lor.s | 9 ldlarh w0,[x1]
37 ldlarh x0,[x1]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-lor.txt | 12 # CHECK: ldlarh w0, [x1]
|
| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.1a-lor.txt | 12 # CHECK: ldlarh w0, [x1]
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1659 COMPARE(ldlarh(w18, MemOperand(x19)), "ldlarh w18, [x19]"); in TEST()
1660 COMPARE(ldlarh(w20, MemOperand(sp)), "ldlarh w20, [sp]"); in TEST()
1661 COMPARE(ldlarh(x21, MemOperand(x22)), "ldlarh w21, [x22]"); in TEST()
1662 COMPARE(ldlarh(x23, MemOperand(sp)), "ldlarh w23, [sp]"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 3522 TEST_LOREGIONS(ldlarh_0, ldlarh(w0, MemOperand(x1, 0)))
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1381 void ldlarh(const Register& rt, const MemOperand& src);
|
| D | assembler-aarch64.cc | 1627 void Assembler::ldlarh(const Register& rt, const MemOperand& src) { in ldlarh() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 1722 ldlarh(rt, src); in Ldlarh()
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1245 void ldlarh(const Register& rt, const MemOperand& src)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2480 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3289 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3495 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12526 "f1sw\006ldff1w\003ldg\004ldgm\005ldlar\006ldlarb\006ldlarh\006ldnf1b\006"
16050 …{ 2524 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, AMFBS_HasLOR, { MCK_GPR32, MCK…
23423 …{ 2524 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, AMFBS_HasLOR, { MCK_GPR32, MCK…
34141 { 2524 /* ldlarh */, 4 /* 2 */, MCK_GPR64sp0, AMFBS_HasLOR },
34142 { 2524 /* ldlarh */, 4 /* 2 */, MCK_GPR64sp0, AMFBS_HasLOR },
|