| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.h | 89 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
92 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
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| D | AMDGPUCallLowering.cpp | 1004 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
1054 LI->loadInputValue(InputReg, MIRBuilder, IncomingArgX, in passSpecialInputs()
1060 LI->loadInputValue(Y, MIRBuilder, IncomingArgY, std::get<1>(WorkitemIDY), in passSpecialInputs()
1069 LI->loadInputValue(Z, MIRBuilder, IncomingArgZ, std::get<1>(WorkitemIDZ), in passSpecialInputs()
1084 LI->loadInputValue(InputReg, MIRBuilder, &IncomingArg, in passSpecialInputs()
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| D | AMDGPUISelLowering.h | 321 SDValue loadInputValue(SelectionDAG &DAG,
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| D | AMDGPULegalizerInfo.cpp | 1745 if (!loadInputValue(QueuePtr, B, AMDGPUFunctionArgInfo::QUEUE_PTR)) in getSegmentAperture()
2693 bool AMDGPULegalizerInfo::loadInputValue(Register DstReg, MachineIRBuilder &B, in loadInputValue() function in AMDGPULegalizerInfo
2724 bool AMDGPULegalizerInfo::loadInputValue( in loadInputValue() function in AMDGPULegalizerInfo
2735 return loadInputValue(DstReg, B, Arg, ArgRC, ArgTy); in loadInputValue()
2741 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
3440 if (!loadInputValue(KernargPtrReg, B, in getImplicitArgPtr()
4487 if (!loadInputValue(LiveIn, B, AMDGPUFunctionArgInfo::QUEUE_PTR)) in legalizeTrapIntrinsic()
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| D | SIISelLowering.cpp | 2714 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2764 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2767 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
2775 SDValue Z = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgZ); in passSpecialInputs()
2789 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, IncomingArg); in passSpecialInputs()
6550 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
6554 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
6558 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
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| D | AMDGPUISelLowering.cpp | 4166 SDValue AMDGPUTargetLowering::loadInputValue(SelectionDAG &DAG, in loadInputValue() function in AMDGPUTargetLowering
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULegalizerInfo.h | 81 bool loadInputValue(Register DstReg, MachineIRBuilder &B,
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| D | AMDGPUISelLowering.h | 308 SDValue loadInputValue(SelectionDAG &DAG,
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| D | AMDGPULegalizerInfo.cpp | 1225 if (!loadInputValue(QueuePtr, B, &MFI->getArgInfo().QueuePtr)) in getSegmentAperture()
1841 bool AMDGPULegalizerInfo::loadInputValue(Register DstReg, MachineIRBuilder &B, in loadInputValue() function in AMDGPULegalizerInfo
1905 if (loadInputValue(MI.getOperand(0).getReg(), B, Arg)) { in legalizePreloadedArgIntrin()
2272 if (!loadInputValue(KernargPtrReg, B, Arg)) in legalizeImplicitArgPtr()
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| D | SIISelLowering.cpp | 2496 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2542 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgX); in passSpecialInputs()
2545 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
2553 SDValue Z = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgZ); in passSpecialInputs()
2567 InputReg = loadInputValue(DAG, ArgRC, MVT::i32, DL, IncomingArg); in passSpecialInputs()
5881 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
5886 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
5891 return loadInputValue(DAG, &AMDGPU::VGPR_32RegClass, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
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| D | AMDGPUISelLowering.cpp | 4184 SDValue AMDGPUTargetLowering::loadInputValue(SelectionDAG &DAG, in loadInputValue() function in AMDGPUTargetLowering
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