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Searched refs:lods (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/test/MC/X86/
Dx86-16.s856 lods %ds:(%si), %al
857 lods (%si), %al
867 lods %ds:(%si), %ax
868 lods (%si), %ax
878 lods %ds:(%si), %eax
879 lods (%si), %eax
Dx86-32.s981 lods %ds:(%esi), %al
982 lods (%esi), %al
992 lods %ds:(%esi), %ax
993 lods (%esi), %ax
1003 lods %ds:(%esi), %eax
1004 lods (%esi), %eax
Dx86-64.s1214 lods %ds:(%rsi), %al
1215 lods (%rsi), %al
1225 lods %ds:(%rsi), %ax
1226 lods (%rsi), %ax
1236 lods %ds:(%rsi), %eax
1237 lods (%rsi), %eax
1247 lods %ds:(%rsi), %rax
1248 lods (%rsi), %rax
Dindex-operations.s43 lods (%esi), %ax label
Dintel-syntax.s765 lods dword ptr [eax] label
/external/llvm-project/llvm/test/MC/X86/
Dx86-16.s881 lods %ds:(%si), %al
882 lods (%si), %al
892 lods %ds:(%si), %ax
893 lods (%si), %ax
903 lods %ds:(%si), %eax
904 lods (%si), %eax
Dx86-32.s1001 lods %ds:(%esi), %al
1002 lods (%esi), %al
1012 lods %ds:(%esi), %ax
1013 lods (%esi), %ax
1023 lods %ds:(%esi), %eax
1024 lods (%esi), %eax
Dx86-64.s1252 lods %ds:(%rsi), %al
1253 lods (%rsi), %al
1263 lods %ds:(%rsi), %ax
1264 lods (%rsi), %ax
1274 lods %ds:(%rsi), %eax
1275 lods (%rsi), %eax
1285 lods %ds:(%rsi), %rax
1286 lods (%rsi), %rax
Dcode16gcc.s15 lods (%esi), %ax
Dindex-operations.s43 lods (%esi), %ax label
Dintel-syntax.s838 lods dword ptr [eax] label
/external/llvm-project/llvm/test/MC/Disassembler/X86/
Dprefixes-i386.txt19 0xf3 0xac #rep lods
21 0xf3 0xad #rep lods
Dprefixes.txt16 0xf3 0xac #rep lods
18 0xf3 0xad #rep lods
/external/google-breakpad/src/third_party/libdisasm/
DTODO24 * stos, cmps, scas, movs, ins, outs, lods -> OP_PTR
/external/deqp/external/vulkancts/modules/vulkan/texture/
DvktTextureFilteringExplicitLodTests.cpp693 std::vector<float> coords, layers, dRefs, dPdxs, dPdys, lods; in execute() local
708 lods .push_back(sampleArgs.lod); in execute()
718 reinterpret_cast<const void*>(&lods[0]) in execute()
/external/deqp/external/openglcts/modules/glesext/texture_cube_map_array/
DesextcTextureCubeMapArraySampling.cpp1113 void prepareLodForFace(glw::GLfloat* lods, glw::GLuint n_mipmap_levels) in prepareLodForFace() argument
1118 lods[0] = base_level; in prepareLodForFace()
1119 lods[1] = top_level; in prepareLodForFace()
1120 lods[2] = base_level; in prepareLodForFace()
1121 lods[3] = top_level; in prepareLodForFace()
1122 lods[4] = base_level; in prepareLodForFace()
1123 lods[5] = top_level; in prepareLodForFace()
1124 lods[6] = base_level; in prepareLodForFace()
1125 lods[7] = top_level; in prepareLodForFace()
1126 lods[8] = base_level; in prepareLodForFace()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dno-shrink-extloads.ll6 ; load. There aren't extending scalar lods, so that would require
/external/llvm/test/CodeGen/AMDGPU/
Dno-shrink-extloads.ll6 ; load. There aren't extending scalar lods, so that would require
/external/llvm/lib/Target/X86/
DX86InstrInfo.td1982 "lods{l|d}\t{$src, %eax|eax, $src}", [], IIC_LODS>, OpSize32;
2752 // lods aliases. Accept the destination being omitted because it's implicit
2757 def : InstAlias<"lods{l|d}\t$src", (LODSL srcidx32:$src), 0>;
2759 def : InstAlias<"lods\t{$src, %al|al, $src}", (LODSB srcidx8:$src), 0>;
2760 def : InstAlias<"lods\t{$src, %ax|ax, $src}", (LODSW srcidx16:$src), 0>;
2761 def : InstAlias<"lods\t{$src, %eax|eax, $src}", (LODSL srcidx32:$src), 0>;
2762 def : InstAlias<"lods\t{$src, %rax|rax, $src}", (LODSQ srcidx64:$src), 0>, Requires<[In64BitMode]>;
2763 def : InstAlias<"lods\t$src", (LODSB srcidx8:$src), 0>;
2764 def : InstAlias<"lods\t$src", (LODSW srcidx16:$src), 0>;
2765 def : InstAlias<"lods\t$src", (LODSL srcidx32:$src), 0>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td2196 "lods{l|d}\t{$src, %eax|eax, $src}", []>, OpSize32;
3234 // lods aliases. Accept the destination being omitted because it's implicit
3239 def : InstAlias<"lods{l|d}\t$src", (LODSL srcidx32:$src), 0>;
3241 def : InstAlias<"lods\t{$src, %al|al, $src}", (LODSB srcidx8:$src), 0>;
3242 def : InstAlias<"lods\t{$src, %ax|ax, $src}", (LODSW srcidx16:$src), 0>;
3243 def : InstAlias<"lods\t{$src, %eax|eax, $src}", (LODSL srcidx32:$src), 0>;
3244 def : InstAlias<"lods\t{$src, %rax|rax, $src}", (LODSQ srcidx64:$src), 0>, Requires<[In64BitMode]>;
3245 def : InstAlias<"lods\t$src", (LODSB srcidx8:$src), 0, "intel">;
3246 def : InstAlias<"lods\t$src", (LODSW srcidx16:$src), 0, "intel">;
3247 def : InstAlias<"lods\t$src", (LODSL srcidx32:$src), 0, "intel">;
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td2262 "lods{l|d}\t{$src, %eax|eax, $src}", []>, OpSize32;
3358 // lods aliases. Accept the destination being omitted because it's implicit
3363 def : InstAlias<"lods{l|d}\t$src", (LODSL srcidx32:$src), 0>;
3365 def : InstAlias<"lods\t{$src, %al|al, $src}", (LODSB srcidx8:$src), 0>;
3366 def : InstAlias<"lods\t{$src, %ax|ax, $src}", (LODSW srcidx16:$src), 0>;
3367 def : InstAlias<"lods\t{$src, %eax|eax, $src}", (LODSL srcidx32:$src), 0>;
3368 def : InstAlias<"lods\t{$src, %rax|rax, $src}", (LODSQ srcidx64:$src), 0>, Requires<[In64BitMode]>;
3369 def : InstAlias<"lods\t$src", (LODSB srcidx8:$src), 0, "intel">;
3370 def : InstAlias<"lods\t$src", (LODSW srcidx16:$src), 0, "intel">;
3371 def : InstAlias<"lods\t$src", (LODSL srcidx32:$src), 0, "intel">;
[all …]
/external/mesa3d/src/mesa/x86/
Dassyntax.h517 #define LODS_L CHOICE(lodsl, lodsl, _LTOG lods)
518 #define LODS_W CHOICE(lodsw, lodsw, _WTOG lods)
/external/elfutils/libcpu/defs/
Di386408 1010110{w}:{R}lods {ds_si},{ax}{w}
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...

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