| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 1091 Variable *Var = makeReg(Ty, RegNum); in legalizeUndef()
1105 Variable *TargetMIPS32::makeReg(Type Type, RegNumT RegNum) { in makeReg() function in Ice::MIPS32::TargetMIPS32
1648 auto *PhysicalRegister = makeReg(RegType, Var->getRegNum()); in addProlog()
1772 auto *PhysicalRegister = makeReg(RegType, (*RIter)->getRegNum()); in addEpilog()
1803 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); in newBaseRegister()
1839 SrcR = Target->makeReg( in legalizeMovFp()
1842 SrcR = Target->makeReg( in legalizeMovFp()
1885 Variable *SrcGPRHi = Target->makeReg( in legalizeMov()
1887 Variable *SrcGPRLo = Target->makeReg( in legalizeMov()
1891 DstFPRHi = Target->makeReg(IceType_i32, in legalizeMov()
[all …]
|
| D | IceTargetLoweringX86BaseImpl.h | 1562 T = makeReg(IceType_i64);
1565 T = makeReg(IceType_i32);
1575 Variable *T = makeReg(Dest->getType());
1653 Variable *Tmp = makeReg(RegisterArg->getType());
1734 Variable *T = makeReg(Traits::WordType);
2076 Variable *T_4Lo = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
2077 Variable *T_4Hi = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
2138 Variable *T = makeReg(Ty);
2144 Variable *T = makeReg(Ty);
2150 Variable *T = makeReg(Ty);
[all …]
|
| D | IceTargetLoweringARM32.cpp | 881 Variable *T = makeReg(IceType_i32); in insertGotPtrInitPlaceholder()
955 auto *PC = makeReg(IceType_i32, RegARM32::Reg_pc); in loadNamedConstantRelocatablePIC()
1762 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); in newBaseRegister()
2263 Variable *T = makeReg(IceType_i32); in lowerAlloca()
2274 T = makeReg(getPointerType()); in lowerAlloca()
2294 Variable *T = makeReg(IceType_i32); in div0Check()
2303 Variable *T = makeReg(IceType_i32); in div0Check()
2324 T0R = makeReg(IceType_i32); in lowerIDivRem()
2326 T1R = makeReg(IceType_i32); in lowerIDivRem()
2332 Variable *T2 = makeReg(IceType_i32); in lowerIDivRem()
[all …]
|
| D | IceTargetLoweringX8664.cpp | 399 T = makeReg(IceType_i32); in _sandbox_mem_reference()
482 Variable *T64 = makeReg(IceType_i64, RegNum); in _sandbox_mem_reference()
497 Variable *NewT = makeReg(IceType_i32, RegNum32); in _sandbox_mem_reference()
510 T = makeReg(IceType_i64, RegNum); in _sandbox_mem_reference()
619 Variable *T = makeReg(IceType_i64); in lowerIndirectJump()
624 Variable *T = makeReg(IceType_i32); in lowerIndirectJump()
625 Variable *T64 = makeReg(IceType_i64); in lowerIndirectJump()
688 Variable *T = makeReg(IceType_i32); in emitCallToTarget()
689 Variable *T64 = makeReg(IceType_i64); in emitCallToTarget()
714 Variable *T = makeReg(IceType_i64); in emitCallToTarget()
[all …]
|
| D | IceTargetLoweringX8632.cpp | 405 Variable *T_ecx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ecx); in emitSandboxedReturn()
417 Variable *EAX = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax); in emitStackProbe()
418 Variable *ESP = makeReg(IceType_i32, Traits::RegisterSet::Reg_esp); in emitStackProbe()
419 Variable *ECX = makeReg(IceType_i32, Traits::RegisterSet::Reg_ecx); in emitStackProbe()
|
| D | IceTargetLoweringX8664.h | 81 Variable *TDB = makeReg(IceType_i32); in createNaClReadTPSrcOperand()
|
| D | IceTargetLoweringMIPS32.h | 672 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
675 auto *Zero = makeReg(IceType_i32, RegMIPS32::Reg_ZERO); in getZero()
681 return makeReg(IceType_i32, RegNum);
685 return makeReg(IceType_f32, RegNum);
689 return makeReg(IceType_f64, RegNum);
|
| D | IceTargetLoweringX86Base.h | 431 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
715 Dest = makeReg(Src0->getType(), RegNum);
|
| D | IceTargetLoweringARM32.h | 303 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 225 void makeReg(unsigned RegNo) { in makeReg() function in __anon69c3c0360111::AVROperand
708 Op.makeReg(RegNum); in validateTargetOperandClass()
724 Op.makeReg(correspondingDREG); in validateTargetOperandClass()
|
| /external/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 227 void makeReg(unsigned RegNo) { in makeReg() function in __anon181354a20111::AVROperand
728 Op.makeReg(RegNum); in validateTargetOperandClass()
744 Op.makeReg(correspondingDREG); in validateTargetOperandClass()
|