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Searched refs:march (Results 1 – 25 of 4028) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/SPARC/
D	LeonCASAInstructionUT.ll	1 ; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+hasleoncasa -o - \| FileCheck %s 2 ; RUN: llc %s -O0 -march=sparc -mcpu=gr712rc -o - \| FileCheck %s 3 ; RUN: llc %s -O0 -march=sparc -mcpu=leon4 -o - \| FileCheck %s 4 ; RUN: llc %s -O0 -march=sparc -mcpu=gr740 -o - \| FileCheck %s 5 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2 -o - \| FileCheck %s 6 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.1 -o - \| FileCheck %s 7 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.2 -o - \| FileCheck %s 8 ; RUN: llc %s -O0 -march=sparc -mcpu=myriad2.3 -o - \| FileCheck %s 9 ; RUN: llc %s -O0 -march=sparc -mcpu=ma2100 -o - \| FileCheck %s 10 ; RUN: llc %s -O0 -march=sparc -mcpu=ma2150 -o - \| FileCheck %s [all …]
D	ctpop.ll	1 ; RUN: llc < %s -march=sparc -mattr=-v9 \| FileCheck %s -check-prefix=V8 2 ; RUN: llc < %s -march=sparc -mattr=+v9,+popc \| FileCheck %s -check-prefix=V9 3 ; RUN: llc < %s -march=sparc -mcpu=v9 \| FileCheck %s -check-prefix=V8 4 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc \| FileCheck %s -check-prefix=V8 5 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 \| FileCheck %s -check-prefix=V8 6 ; RUN: llc < %s -march=sparc -mcpu=niagara \| FileCheck %s -check-prefix=V8 7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 \| FileCheck %s -check-prefix=V9 8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 \| FileCheck %s -check-prefix=V9 9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 \| FileCheck %s -check-prefix=V9 10 ; RUN: llc < %s -march=sparcv9 -mattr=+popc \| FileCheck %s -check-prefix=SPARC64
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
D	elf-header-flags-mach.ll	1 ; RUN: llc -filetype=obj -march=r600 -mcpu=r600 < %s \| llvm-readobj -file-headers - \| FileCheck --c… 2 ; RUN: llc -filetype=obj -march=r600 -mcpu=r630 < %s \| llvm-readobj -file-headers - \| FileCheck --c… 3 ; RUN: llc -filetype=obj -march=r600 -mcpu=rs880 < %s \| llvm-readobj -file-headers - \| FileCheck --… 4 ; RUN: llc -filetype=obj -march=r600 -mcpu=rv670 < %s \| llvm-readobj -file-headers - \| FileCheck --… 5 ; RUN: llc -filetype=obj -march=r600 -mcpu=rv710 < %s \| llvm-readobj -file-headers - \| FileCheck --… 6 ; RUN: llc -filetype=obj -march=r600 -mcpu=rv730 < %s \| llvm-readobj -file-headers - \| FileCheck --… 7 ; RUN: llc -filetype=obj -march=r600 -mcpu=rv770 < %s \| llvm-readobj -file-headers - \| FileCheck --… 8 ; RUN: llc -filetype=obj -march=r600 -mcpu=cedar < %s \| llvm-readobj -file-headers - \| FileCheck --… 9 ; RUN: llc -filetype=obj -march=r600 -mcpu=cypress < %s \| llvm-readobj -file-headers - \| FileCheck … 10 ; RUN: llc -filetype=obj -march=r600 -mcpu=juniper < %s \| llvm-readobj -file-headers - \| FileCheck … [all …]
/external/llvm/test/CodeGen/PowerPC/
D	Frames-leaf.ll	`1 ; RUN: llc < %s -march=ppc32 \| \ 3 ; RUN: llc < %s -march=ppc32 \| \ 5 ; RUN: llc < %s -march=ppc32 \| \ 7 ; RUN: llc < %s -march=ppc32 \| \ 9 ; RUN: llc < %s -march=ppc32 -disable-fp-elim \| \ 11 ; RUN: llc < %s -march=ppc32 -disable-fp-elim \| \ 13 ; RUN: llc < %s -march=ppc32 -disable-fp-elim \| \ 15 ; RUN: llc < %s -march=ppc32 -disable-fp-elim \| \ 17 ; RUN: llc < %s -march=ppc64 \| \ 19 ; RUN: llc < %s -march=ppc64 \| \ [all …]`
D	i64_fp.ll	`4 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit \| \ 6 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+64bit \| \ 8 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 \| \ 10 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g5 \| \ 12 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit \| \ 14 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=-64bit \| \ 16 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 \| \ 18 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mcpu=g4 \| \`
/external/llvm/test/CodeGen/X86/
D	x86-64-double-shifts-var.ll	1 ; RUN: llc < %s -march=x86-64 -mcpu=athlon \| FileCheck %s 2 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-tbird \| FileCheck %s 3 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-4 \| FileCheck %s 4 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-xp \| FileCheck %s 5 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-mp \| FileCheck %s 6 ; RUN: llc < %s -march=x86-64 -mcpu=k8 \| FileCheck %s 7 ; RUN: llc < %s -march=x86-64 -mcpu=opteron \| FileCheck %s 8 ; RUN: llc < %s -march=x86-64 -mcpu=athlon64 \| FileCheck %s 9 ; RUN: llc < %s -march=x86-64 -mcpu=athlon-fx \| FileCheck %s 10 ; RUN: llc < %s -march=x86-64 -mcpu=k8-sse3 \| FileCheck %s [all …]
/external/llvm-project/llvm/test/CodeGen/AVR/features/
D	xmega_io.ll	1 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega1 \| FileCheck %s -check-prefix=XMEGA 2 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega2 \| FileCheck %s -check-prefix=XMEGA 3 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega3 \| FileCheck %s -check-prefix=XMEGA 4 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega4 \| FileCheck %s -check-prefix=XMEGA 5 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega5 \| FileCheck %s -check-prefix=XMEGA 6 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega6 \| FileCheck %s -check-prefix=XMEGA 7 ; RUN: llc -O0 < %s -march=avr -mcpu avrxmega7 \| FileCheck %s -check-prefix=XMEGA 8 ; RUN: llc -O0 < %s -march=avr -mcpu avr2 \| FileCheck %s -check-prefix=AVR 9 ; RUN: llc -O0 < %s -march=avr -mcpu avr25 \| FileCheck %s -check-prefix=AVR 10 ; RUN: llc -O0 < %s -march=avr -mcpu avr3 \| FileCheck %s -check-prefix=AVR [all …]
/external/llvm/test/CodeGen/Mips/
D	check-adde-redundant-moves.ll	1 ; RUN: llc < %s -march=mips -mcpu=mips2 \| FileCheck %s -check-prefixes=ALL,GP32 2 ; RUN: llc < %s -march=mips -mcpu=mips32 \| FileCheck %s -check-prefixes=ALL,GP32 3 ; RUN: llc < %s -march=mips -mcpu=mips32r2 \| FileCheck %s -check-prefixes=ALL,GP32 4 ; RUN: llc < %s -march=mips -mcpu=mips32r3 \| FileCheck %s -check-prefixes=ALL,GP32 5 ; RUN: llc < %s -march=mips -mcpu=mips32r5 \| FileCheck %s -check-prefixes=ALL,GP32 6 ; RUN: llc < %s -march=mips -mcpu=mips32r6 \| FileCheck %s -check-prefixes=ALL,GP32 7 ; RUN: llc < %s -march=mips64 -mcpu=mips3 \| FileCheck %s -check-prefix=ALL 8 ; RUN: llc < %s -march=mips64 -mcpu=mips4 \| FileCheck %s -check-prefix=ALL 9 ; RUN: llc < %s -march=mips64 -mcpu=mips64 \| FileCheck %s -check-prefix=ALL 10 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 \| FileCheck %s -check-prefix=ALL [all …]
D	mature-mc-support.ll	6 ; SKIP: not llc -march=mips < %s > /dev/null 2> %t1 9 ; RUN: not llc -march=mips -filetype=obj < %s > /dev/null 2> %t2 12 ; SKIP: not llc -march=mipsel < %s > /dev/null 2> %t3 15 ; RUN: not llc -march=mipsel -filetype=obj < %s > /dev/null 2> %t4 18 ; SKIP: not llc -march=mips64 < %s > /dev/null 2> %t5 21 ; RUN: not llc -march=mips64 -filetype=obj < %s > /dev/null 2> %t6 24 ; SKIP: not llc -march=mips64el < %s > /dev/null 2> %t7 27 ; RUN: not llc -march=mips64el -filetype=obj < %s > /dev/null 2> %t8
/external/llvm-project/llvm/test/CodeGen/Mips/
D	check-adde-redundant-moves.ll	1 ; RUN: llc < %s -march=mips -mcpu=mips2 \| FileCheck %s -check-prefixes=ALL,GP32 2 ; RUN: llc < %s -march=mips -mcpu=mips32 \| FileCheck %s -check-prefixes=ALL,GP32 3 ; RUN: llc < %s -march=mips -mcpu=mips32r2 \| FileCheck %s -check-prefixes=ALL,GP32 4 ; RUN: llc < %s -march=mips -mcpu=mips32r3 \| FileCheck %s -check-prefixes=ALL,GP32 5 ; RUN: llc < %s -march=mips -mcpu=mips32r5 \| FileCheck %s -check-prefixes=ALL,GP32 6 ; RUN: llc < %s -march=mips -mcpu=mips32r6 \| FileCheck %s -check-prefixes=ALL,GP32 7 ; RUN: llc < %s -march=mips64 -mcpu=mips3 \| FileCheck %s -check-prefix=ALL 8 ; RUN: llc < %s -march=mips64 -mcpu=mips4 \| FileCheck %s -check-prefix=ALL 9 ; RUN: llc < %s -march=mips64 -mcpu=mips64 \| FileCheck %s -check-prefix=ALL 10 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 \| FileCheck %s -check-prefix=ALL [all …]
D	ase_warnings.ll	2 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+msa -mattr=+fp64 < %s 2>&1 \| \ 4 ; RUN: llc -march=mips64 -mattr=+mips64r2 -mattr=+msa < %s 2>&1 \| \ 6 ; RUN: llc -march=mips -mattr=+mips32r5 -mattr=+msa -mattr=+fp64 < %s 2>&1 \| \ 8 ; RUN: llc -march=mips64 -mattr=+mips64r5 -mattr=+msa < %s 2>&1 \| \ 12 ; RUN: llc -march=mips -mattr=+mips32 -mattr=+dspr2 < %s 2>&1 \| \ 14 ; RUN: llc -march=mips64 -mattr=+mips64 -mattr=+dspr2 < %s 2>&1 \| \ 16 ; RUN: llc -march=mips64 -mattr=+mips64r3 -mattr=+dspr2 < %s 2>&1 \| \ 18 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+dspr2 < %s 2>&1 \| \ 22 ; RUN: llc -march=mips -mattr=+mips32 -mattr=+dsp < %s 2>&1 \| \ 24 ; RUN: llc -march=mips64 -mattr=+mips64 -mattr=+dsp < %s 2>&1 \| \ [all …]
D	mature-mc-support.ll	6 ; SKIP: not llc -march=mips < %s > /dev/null 2> %t1 9 ; RUN: not llc -march=mips -filetype=obj < %s > /dev/null 2> %t2 12 ; SKIP: not llc -march=mipsel < %s > /dev/null 2> %t3 15 ; RUN: not llc -march=mipsel -filetype=obj < %s > /dev/null 2> %t4 18 ; SKIP: not llc -march=mips64 < %s > /dev/null 2> %t5 21 ; RUN: not llc -march=mips64 -filetype=obj < %s > /dev/null 2> %t6 24 ; SKIP: not llc -march=mips64el < %s > /dev/null 2> %t7 27 ; RUN: not llc -march=mips64el -filetype=obj < %s > /dev/null 2> %t8
D	stack-alignment.ll	1 ; RUN: llc -march=mipsel < %s \| FileCheck %s -check-prefix=32 2 ; RUN: llc -march=mipsel -stack-alignment=32 < %s \| FileCheck %s -check-prefix=A32-32 3 ; RUN: llc -march=mipsel -mattr=+fp64,+mips32r2 < %s \| FileCheck %s -check-prefix=32 4 ; RUN: llc -march=mips64el -mcpu=mips3 < %s \| FileCheck %s -check-prefix=64 5 ; RUN: llc -march=mips64el -mcpu=mips4 < %s \| FileCheck %s -check-prefix=64 6 ; RUN: llc -march=mips64el -mcpu=mips64 < %s \| FileCheck %s -check-prefix=64 7 ; RUN: llc -march=mips64el -mcpu=mips64 -stack-alignment=32 < %s \| FileCheck %s -check-prefix=A32-64
/external/llvm/test/CodeGen/SPARC/
D	ctpop.ll	1 ; RUN: llc < %s -march=sparc -mattr=-v9 \| FileCheck %s -check-prefix=V8 2 ; RUN: llc < %s -march=sparc -mattr=+v9,+popc \| FileCheck %s -check-prefix=V9 3 ; RUN: llc < %s -march=sparc -mcpu=v9 \| FileCheck %s -check-prefix=V8 4 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc \| FileCheck %s -check-prefix=V8 5 ; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 \| FileCheck %s -check-prefix=V8 6 ; RUN: llc < %s -march=sparc -mcpu=niagara \| FileCheck %s -check-prefix=V8 7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 \| FileCheck %s -check-prefix=V9 8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 \| FileCheck %s -check-prefix=V9 9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 \| FileCheck %s -check-prefix=V9 10 ; RUN: llc < %s -march=sparcv9 -mattr=+popc \| FileCheck %s -check-prefix=SPARC64
/external/llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/
D	check-disabled-mcpus.ll	2 ; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \ 4 ; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic -target-abi n64 \ 6 ; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic -target-abi n64 \ 9 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \ 12 ; RUN: llc -march=mips -mattr=mips16 -O0 -relocation-model=pic \ 15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \ 17 ; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips -O0 -relocation-model=pic \ 19 ; RUN: llc -march=mips -mcpu=mips32r5 -mattr=+micromips -O0 -relocation-model=pic \ 22 ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \ 24 ; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic -target-abi n64 \ [all …]
/external/llvm-project/llvm/test/CodeGen/Hexagon/intrinsics/
D	atomicrmw_bitwise_native.ll	1 ; RUN: sed -e "s/ORDER/monotonic/" -e "s/BINARY_OP/and/" %s \| llc -march=hexagon \| FileCheck %s 2 ; RUN: sed -e "s/ORDER/acquire/" -e "s/BINARY_OP/and/" %s \| llc -march=hexagon \| FileCheck %s 3 ; RUN: sed -e "s/ORDER/release/" -e "s/BINARY_OP/and/" %s \| llc -march=hexagon \| FileCheck %s 4 ; RUN: sed -e "s/ORDER/acq_rel/" -e "s/BINARY_OP/and/" %s \| llc -march=hexagon \| FileCheck %s 5 ; RUN: sed -e "s/ORDER/seq_cst/" -e "s/BINARY_OP/and/" %s \| llc -march=hexagon \| FileCheck %s 6 ; RUN: sed -e "s/ORDER/monotonic/" -e "s/BINARY_OP/xor/" %s \| llc -march=hexagon \| FileCheck %s 7 ; RUN: sed -e "s/ORDER/acquire/" -e "s/BINARY_OP/xor/" %s \| llc -march=hexagon \| FileCheck %s 8 ; RUN: sed -e "s/ORDER/release/" -e "s/BINARY_OP/xor/" %s \| llc -march=hexagon \| FileCheck %s 9 ; RUN: sed -e "s/ORDER/acq_rel/" -e "s/BINARY_OP/xor/" %s \| llc -march=hexagon \| FileCheck %s 10 ; RUN: sed -e "s/ORDER/seq_cst/" -e "s/BINARY_OP/xor/" %s \| llc -march=hexagon \| FileCheck %s [all …]
D	fence.ll	1 ; RUN: sed -e "s/ORDER/acquire/" %s \| llc -march=hexagon \| FileCheck %s 2 ; RUN: sed -e "s/ORDER/release/" %s \| llc -march=hexagon \| FileCheck %s 3 ; RUN: sed -e "s/ORDER/acq_rel/" %s \| llc -march=hexagon \| FileCheck %s 4 ; RUN: sed -e "s/ORDER/seq_cst/" %s \| llc -march=hexagon \| FileCheck %s 5 ; RUN: sed -e 's/ORDER/syncscope("singlethread") acquire/' %s \| llc -march=hexagon \| FileCheck %s 6 ; RUN: sed -e 's/ORDER/syncscope("singlethread") release/' %s \| llc -march=hexagon \| FileCheck %s 7 ; RUN: sed -e 's/ORDER/syncscope("singlethread") acq_rel/' %s \| llc -march=hexagon \| FileCheck %s 8 ; RUN: sed -e 's/ORDER/syncscope("singlethread") seq_cst/' %s \| llc -march=hexagon \| FileCheck %s
/external/llvm/test/CodeGen/Mips/Fast-ISel/
D	check-disabled-mcpus.ll	1 ; RUN: llc -march=mips -mcpu=mips2 -O0 -relocation-model=pic \ 3 ; RUN: llc -march=mips -mcpu=mips3 -O0 -relocation-model=pic -target-abi n64 \ 5 ; RUN: llc -march=mips -mcpu=mips4 -O0 -relocation-model=pic -target-abi n64 \ 8 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \ 10 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \ 13 ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \ 15 ; RUN: llc -march=mips -mcpu=mips64r2 -O0 -relocation-model=pic -target-abi n64 \ 17 ; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic -target-abi n64 \ 19 ; RUN: llc -march=mips -mcpu=mips64r5 -O0 -relocation-model=pic -target-abi n64 \ 21 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
D	indirectbr.ll	3 ; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 4 ; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 5 ; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 6 ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 7 ; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,R6C 8 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 9 ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 10 ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… [all …]
D	call.ll	3 ; RUN: llc -march=mips -mcpu=mips32 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck … 4 ; RUN: llc -march=mips -mcpu=mips32r2 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck … 5 ; RUN: llc -march=mips -mcpu=mips32r3 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck … 6 ; RUN: llc -march=mips -mcpu=mips32r5 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck … 7 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tai… 8 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mip… 9 ; RUN: llc -march=mips64 -mcpu=mips4 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck… 10 ; RUN: llc -march=mips64 -mcpu=mips64 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck… 11 ; RUN: llc -march=mips64 -mcpu=mips64r2 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck… 12 ; RUN: llc -march=mips64 -mcpu=mips64r3 -relocation-model=pic -mips-tail-calls=1 < %s \| FileCheck… [all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
D	indirectbr.ll	3 ; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 4 ; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 5 ; RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 6 ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 7 ; RUN: llc -march=mips -mcpu=mips32r6 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,R6C 8 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 9 ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 10 ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… 12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s \| FileCheck %s -check-prefixes=ALL,NOT-… [all …]
D	udiv.ll	1 ; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic \| FileCheck %s \ 3 ; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic \| FileCheck %s \ 5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic \| FileCheck %s \ 7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic \| FileCheck %s \ 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic \| FileCheck %s \ 11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic \| FileCheck %s \ 14 ; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic \| FileCheck %s \ 16 ; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic \| FileCheck %s \ 18 ; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic \| FileCheck %s \ 20 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic \| FileCheck %s \ [all …]
D	xor.ll	1 ; RUN: llc < %s -march=mips -mcpu=mips2 \| FileCheck %s -check-prefixes=ALL,GP32 2 ; RUN: llc < %s -march=mips -mcpu=mips32 \| FileCheck %s -check-prefixes=ALL,GP32 3 ; RUN: llc < %s -march=mips -mcpu=mips32r2 \| FileCheck %s \ 5 ; RUN: llc < %s -march=mips -mcpu=mips32r3 \| FileCheck %s \ 7 ; RUN: llc < %s -march=mips -mcpu=mips32r5 \| FileCheck %s \ 9 ; RUN: llc < %s -march=mips -mcpu=mips32r6 \| FileCheck %s \ 11 ; RUN: llc < %s -march=mips64 -mcpu=mips3 \| FileCheck %s \ 13 ; RUN: llc < %s -march=mips64 -mcpu=mips4 \| FileCheck %s \ 15 ; RUN: llc < %s -march=mips64 -mcpu=mips64 \| FileCheck %s \ 17 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 \| FileCheck %s \ [all …]
/external/llvm-project/llvm/test/CodeGen/Mips/cconv/
D	stack-alignment.ll	1 ; RUN: llc -march=mips < %s \| FileCheck --check-prefixes=ALL,O32 %s 2 ; RUN: llc -march=mipsel < %s \| FileCheck --check-prefixes=ALL,O32 %s 4 ; RUN-TODO: llc -march=mips64 -target-abi o32 < %s \| FileCheck --check-prefixes=ALL,O32 %s 5 ; RUN-TODO: llc -march=mips64el -target-abi o32 < %s \| FileCheck --check-prefixes=ALL,O32 %s 7 ; RUN: llc -march=mips64 -target-abi n32 < %s \| FileCheck --check-prefixes=ALL,N32 %s 8 ; RUN: llc -march=mips64el -target-abi n32 < %s \| FileCheck --check-prefixes=ALL,N32 %s 10 ; RUN: llc -march=mips64 -target-abi n64 < %s \| FileCheck --check-prefixes=ALL,N64 %s 11 ; RUN: llc -march=mips64el -target-abi n64 < %s \| FileCheck --check-prefixes=ALL,N64 %s
/external/llvm/test/CodeGen/Mips/cconv/
D	stack-alignment.ll	1 ; RUN: llc -march=mips < %s \| FileCheck --check-prefixes=ALL,O32 %s 2 ; RUN: llc -march=mipsel < %s \| FileCheck --check-prefixes=ALL,O32 %s 4 ; RUN-TODO: llc -march=mips64 -target-abi o32 < %s \| FileCheck --check-prefixes=ALL,O32 %s 5 ; RUN-TODO: llc -march=mips64el -target-abi o32 < %s \| FileCheck --check-prefixes=ALL,O32 %s 7 ; RUN: llc -march=mips64 -target-abi n32 < %s \| FileCheck --check-prefixes=ALL,N32 %s 8 ; RUN: llc -march=mips64el -target-abi n32 < %s \| FileCheck --check-prefixes=ALL,N32 %s 10 ; RUN: llc -march=mips64 -target-abi n64 < %s \| FileCheck --check-prefixes=ALL,N64 %s 11 ; RUN: llc -march=mips64el -target-abi n64 < %s \| FileCheck --check-prefixes=ALL,N64 %s

12 3 4 5 6 7 8 9 10 >>...162

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