| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1670 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1700 bool BitSimplification::matchHalf(unsigned SelfR, in matchHalf() function in BitSimplification
1786 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1)) in matchPackhl()
1788 if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1)) in matchPackhl()
1825 if (!matchHalf(0, RC, 0, H)) in genStoreUpperHalf()
1938 if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16)) in genExtractHalf()
1974 if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H)) in genCombineHalf()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1763 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1806 bool BitSimplification::matchHalf(unsigned SelfR, in matchHalf() function in BitSimplification
1898 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1)) in matchPackhl()
1900 if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1)) in matchPackhl()
1935 if (!matchHalf(0, RC, 0, H)) in genStoreUpperHalf()
2054 if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16)) in genExtractHalf()
2093 if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H)) in genCombineHalf()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1753 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1796 bool BitSimplification::matchHalf(unsigned SelfR, in matchHalf() function in BitSimplification
1888 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1)) in matchPackhl()
1890 if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1)) in matchPackhl()
1925 if (!matchHalf(0, RC, 0, H)) in genStoreUpperHalf()
2044 if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16)) in genExtractHalf()
2083 if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H)) in genCombineHalf()
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